Patents by Inventor Soo-Min Choi

Soo-Min Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240156324
    Abstract: A shoe care apparatus includes an inner cabinet, an inlet, an outlet, a connection passage, a heater, a blower, and a desiccant block. The air inside the inner cabinet flows into the connection passage through the inlet, and is discharged back into the inner cabinet through the outlet after being dehumidified by the desiccant block while circulating inside the shoe care apparatus. The heater is located in the inner space of the desiccant block to recycle the desiccant of the desiccant block.
    Type: Application
    Filed: March 7, 2022
    Publication date: May 16, 2024
    Applicant: LG ELECTRONICS INC.
    Inventors: Chang Kyu KIM, Kyoung Min CHOI, Soo Chan YU
  • Patent number: 11961983
    Abstract: Disclosed is a battery module, which includes: a battery cell assembly having at least one battery cell; a module case configured to accommodate the battery cell assembly; and at least one injection hole provided in a bottom portion of the module case to inject a thermally conductive adhesive into the module case.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: April 16, 2024
    Assignee: LG Energy Solution, Ltd.
    Inventors: Soo-Youl Kim, Jae-Hun Yang, Han-Jong Yoon, Jae-Min Lee, Hae-Ryong Jeon, Young-Ho Choi
  • Publication number: 20240082345
    Abstract: Provided is a peptide composition for preventing or treating Alzheimer's dementia. A peptide or a salt substituent thereof according to the presently claimed subject matter exhibits effects such as suppression of LPS-mediated cytokine production, suppression of LPS-induced neuroinflammation, amelioration of cognitive impairment, suppression of beta amyloid or tau protein aggregation, and suppression of neuronal loss. The polypeptide or the salt substituent thereof can permeate the blood-brain barrier, and thus, is expected to be usefully used for preventing or treating Alzheimer's dementia.
    Type: Application
    Filed: August 25, 2021
    Publication date: March 14, 2024
    Applicant: HLB SCIENCE INC.
    Inventors: Yeong Min PARK, Wahn Soo CHOI, Seung-Hyun LEE, In Duk JUNG, Yong Joo KIM, Seung Jun LEE, Sung Min KIM, Mi Suk LEE, Hee Jo PARK, Seung Pyo CHOI, Minho MOON, Soo Jung SHIN, Sujin KIM, Yong Ho PARK, Jae-Yong PARK, Kun Ho LEE
  • Publication number: 20240080320
    Abstract: A server according to an embodiment includes a processor configured to receive a friend add request for a target account from a user terminal accessed with a user account; based on one of the user account and the target account being a protected account, transmit an approval request for the friend add request to a protector account connected to the protected account; and based on receiving a reply to the approval request from the protector terminal, add the target account to a friend list of the user account.
    Type: Application
    Filed: April 27, 2023
    Publication date: March 7, 2024
    Inventors: You Jin KIM, Jung Woo CHOI, Jenog Ryeol CHOI, Joong Seon KIM, Hong Chan YUN, Ju Ho CHUNG, Do Hyun YOUN, Hyung Min KIM, Hyun Ok CHOI, Chun Ho KIM, Soo Beom KIM, Min Jeong KIM, Chang Oh HEO, Eun Soo HEO
  • Publication number: 20140346654
    Abstract: A chip package comprising a carrier, a chip, a plurality of first conductive elements, an encapsulation, and a conductive film is provided. The carrier has a carrying surface and a back surface opposite to the carrying surface. Furthermore, the carrier has a plurality of common contacts in the periphery of the carrying surface. The chip is disposed on the carrying surface and electrically connected to the carrier. In addition, the first conductive elements are disposed on the common contacts respectively. The encapsulation is disposed on the carrying surface and encapsulating the chip. Moreover, the conductive film is disposed over the encapsulation and the first conductive elements, so as to electrically connect with the common contacts via the first conductive elements. A process for fabricating the chip package is further provided. The chip package is capable of preventing the EMI problem and thus provides superior electrical performance.
    Type: Application
    Filed: June 2, 2014
    Publication date: November 27, 2014
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Soo-Min CHOI, Hyeong-No KIM, Jae-Sun AN, Young-Gue LEE, Sang-Jin CHA
  • Patent number: 8866280
    Abstract: A chip package comprising a carrier, a chip, a plurality of first conductive elements, an encapsulation, and a conductive film is provided. The carrier has a carrying surface and a back surface opposite to the carrying surface. Furthermore, the carrier has a plurality of common contacts in the periphery of the carrying surface. The chip is disposed on the carrying surface and electrically connected to the carrier. In addition, the first conductive elements are disposed on the common contacts respectively. The encapsulation is disposed on the carrying surface and encapsulating the chip. Moreover, the conductive film is disposed over the encapsulation and the first conductive elements, so as to electrically connect with the common contacts via the first conductive elements. A process for fabricating the chip package is further provided. The chip package is capable of preventing the EMI problem and thus provides superior electrical performance.
    Type: Grant
    Filed: June 25, 2009
    Date of Patent: October 21, 2014
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Soo-Min Choi, Hyeong-No Kim, Jae-Sun An, Young-Gue Lee, Sang-Jin Cha
  • Publication number: 20090261470
    Abstract: A chip package comprising a carrier, a chip, a plurality of first conductive elements, an encapsulation, and a conductive film is provided. The carrier has a carrying surface and a back surface opposite to the carrying surface. Furthermore, the carrier has a plurality of common contacts in the periphery of the carrying surface. The chip is disposed on the carrying surface and electrically connected to the carrier. In addition, the first conductive elements are disposed on the common contacts respectively. The encapsulation is disposed on the carrying surface and encapsulating the chip. Moreover, the conductive film is disposed over the encapsulation and the first conductive elements, so as to electrically connect with the common contacts via the first conductive elements. A process for fabricating the chip package is further provided. The chip package is capable of preventing the EMI problem and thus provides superior electrical performance.
    Type: Application
    Filed: June 25, 2009
    Publication date: October 22, 2009
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Soo-Min Choi, Hyeong-No Kim, Jae-Sun An, Young-Gue Lee, Sang-Jin Cha
  • Publication number: 20080237821
    Abstract: A package structure and a manufacturing method thereof are provided. The package structure includes a substrate, a shielding plate, a first chip, a first sealant, a second chip and a second sealant. The substrate has a lower surface and an upper surface on which the shielding plate is disposed. The first chip disposed on the shielding plate is electrically connected to the substrate. The first sealant disposed on the upper surface encapsulates the shielding plate and the first chip. The second chip disposed on the lower surface is electrically connected to the substrate. The second sealant disposed on the lower surface encapsulates the second chip.
    Type: Application
    Filed: March 28, 2007
    Publication date: October 2, 2008
    Inventors: Hyeongno Kim, Soo-Min Choi, Jae-Sun An, Young-Gue Lee, Sang-Jin Cha
  • Publication number: 20080237820
    Abstract: A package structure including a substrate, a shielding element, a chip, a sealant layer and a semiconductor device is provided. The substrate has a first surface and a second surface opposite to the first surface. The shielding element is disposed on the first surface. The chip is disposed on the shielding element and is electrically connected to the substrate. The sealant layer is disposed on the first surface, and encapsulates the chip and the shielding element. The semiconductor device is disposed on the second surface.
    Type: Application
    Filed: March 28, 2007
    Publication date: October 2, 2008
    Inventors: Hyeongno Kim, Soo-Min Choi, Jae-Sun An, Young-Gue Lee, Sang-Jin Cha
  • Publication number: 20080197468
    Abstract: A package structure and a manufacturing method thereof are provided. The package structure includes a substrate, a first chip, a cap structure, a second chip and a sealant. The first chip is disposed in an opening of the substrate and is electrically connected to the substrate. The cap structure is disposed on the substrate corresponding to the first chip. The second chip is disposed on the cap structure and is electrically connected to the substrate. The sealant encapsulates the first chip, the cap structure and the second chip.
    Type: Application
    Filed: February 15, 2007
    Publication date: August 21, 2008
    Inventors: Hyeongno Kim, Soo-Min Choi, Jae-Sun An, Young-Gue Lee, Sang-Jin Cha
  • Publication number: 20080128890
    Abstract: A chip package comprising a carrier, a chip, a plurality of first conductive elements, an encapsulation, and a conductive film is provided. The carrier has a carrying surface and a back surface opposite to the carrying surface. Furthermore, the carrier has a plurality of common contacts in the periphery of the carrying surface. The chip is disposed on the carrying surface and electrically connected to the carrier. In addition, the first conductive elements are disposed on the common contacts respectively. The encapsulation is disposed on the carrying surface and encapsulating the chip. Moreover, the conductive film is disposed over the encapsulation and the first conductive elements, so as to electrically connect with the common contacts via the first conductive elements. A process for fabricating the chip package is further provided. The chip package is capable of preventing the EMI problem and thus provides superior electrical performance.
    Type: Application
    Filed: November 30, 2006
    Publication date: June 5, 2008
    Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: SOO-MIN CHOI, HYEONG-NO KIM, JAE-SUN AN, YOUNG-GUE LEE, SANG-JIN CHA