Abstract: A memory system may include: a nonvolatile memory device including a plurality of memory blocks, each memory block including a plurality of pages; and a controller suitable for controlling the nonvolatile memory device to store user data received from a host in a first block among the memory blocks, to store metadata in a second block among the memory blocks, and to generate the metadata corresponding to storage of the user data, the controller may map a first logical address used in the host to a physical address of the first block, and may map a second logical address not used in the host, to a physical address of the second block, the first logical address and the second logical address being successive.

Abstract: A memory system includes: a nonvolatile memory device including a plurality of memory blocks and spare blocks; and a memory controller configured to control the nonvolatile memory device. The nonvolatile memory device may store spare information to any one block of the memory blocks or the spare blocks. When a bad block is detected from the memory blocks, the nonvolatile memory device replaces the bad block with any one of the spare blocks according to the spare information.

Abstract: A memory system may include: a nonvolatile memory device including a plurality of memory blocks, each memory block including a plurality of pages; and a controller suitable for controlling the nonvolatile memory device to store user data received from a host in a first block among the memory blocks, to store metadata in a second block among the memory blocks, and to generate the metadata corresponding to storage of the user data, the controller may map a first logical address used in the host to a physical address of the first block, and may map a second logical address not used in the host, to a physical address of the second block, the first logical address and the second logical address being successive.

Abstract: A memory system includes: a flash translation layer block suitable for receiving data from a host and converting a logic address into a physical address to store address information, during a write operation; a first buffer unit suitable for sequentially receiving the data from the flash translation layer; and a second buffer unit suitable for randomly receiving the data from the flash translation layer, wherein the flash translation layer block outputs data to only one of the first and second buffer units in a fast write mode during the write operation, and updates mapping information on the data stored in the one of the first and second buffer units after the fast write mode is terminated.

Abstract: A data storage apparatus includes a nonvolatile memory device, a random-access memory including an address mapping table configured to store mapping information between a logical address received from a host apparatus and a physical address for the nonvolatile memory device, and a processor configured to generate a modified write logical address by changing a value of a specific bit among bits of a write logical address when a write request is received from the host apparatus, and store the modified write logical address in the address mapping table.

Abstract: A memory system may include: a memory device including a plurality of memory blocks; and a controller suitable for managing the memory blocks as a plurality of super memory blocks by grouping them in a type corresponding to a predetermined condition, managing a bad block pool of the form of bitmaps and indexes by setting super memory blocks among the super memory blocks, in each of which one or more bad memory blocks are included, as bad super memory blocks, and managing regenerated super memory blocks by checking, through the bad block pool, normal memory blocks included in the respective bad super memory blocks and then performing grouping in the type corresponding to the predetermined condition.

Abstract: A memory system includes: a nonvolatile memory device including a plurality of memory blocks and spare blocks; and a memory controller configured to control the nonvolatile memory device. The nonvolatile memory device may store spare information to any one block of the memory blocks or the spare blocks. When a bad block is detected from the memory blocks, the nonvolatile memory device replaces the bad block with any one of the spare blocks according to the spare information.

Abstract: A memory system includes: a flash translation layer block suitable for receiving data from a host and converting a logic address into a physical address to store address information, during a write operation; a first buffer unit suitable for sequentially receiving the data from the flash translation layer; and a second buffer unit suitable for randomly receiving the data from the flash translation layer, wherein the flash translation layer block outputs data to only one of the first and second buffer units in a fast write mode during the write operation, and updates mapping information on the data stored in the one of the first and second buffer units after the fast write mode is terminated.

Abstract: A memory system includes: a flash translation layer block suitable for receiving data from a host and converting a logic address into a physical address to store address information, during a write operation; a first buffer unit suitable for sequentially receiving the data from the flash translation layer; and a second buffer unit suitable for randomly receiving the data from the flash translation layer, wherein the flash translation layer block outputs data to only one of the first and second buffer units in a fast write mode during the write operation, and updates mapping information on the data stored in the one of the first and second buffer units after the fast write mode is terminated.

Abstract: A data storage device includes a nonvolatile memory device, and a controller configured to construct logical address sets each including a start logical address and valid address flags corresponding to the start logical address, from logical addresses provided from a host device, generate an address mapping table by mapping each of the logical address sets to a physical address of the nonvolatile memory device, and perform a request from the host device, by referring to the address mapping table.

Abstract: A memory system may include: a memory device comprising a plurality of memory blocks each having N word line groups; and a controller suitable for: selecting bad memory blocks among the plurality of memory blocks, arranging normal word line groups of the selected bad memory blocks into one or more memory-block-word-line groups each including non-conflicting N normal word line groups, and managing each of the memory-block-word-line groups as a reused memory block.

Abstract: A data storage apparatus includes a nonvolatile memory device, a random-access memory including an address mapping table configured to store mapping information between a logical address received from a host apparatus and a physical address for the nonvolatile memory device, and a processor configured to generate a modified write logical address by changing a value of a specific bit among bits of a write logical address when a write request is received from the host apparatus, and store the modified write logical address in the address mapping table.

Abstract: A memory system may include: a memory device comprising a plurality of memory blocks each having N word line groups; and a controller suitable for: selecting bad memory blocks among the plurality of memory blocks, arranging normal word line groups of the selected bad memory blocks into one or more memory-block-word-line groups each including non-conflicting N normal word line groups, and managing each of the memory-block-word-line groups as a reused memory block.

Abstract: A memory system may include: a memory device including a plurality of memory blocks; and a controller suitable for managing the memory blocks as a plurality of super memory blocks by grouping them in a type corresponding to a predetermined condition, managing a bad block pool of the form of bitmaps and indexes by setting super memory blocks among the super memory blocks, in each of which one or more bad memory blocks are included, as bad super memory blocks, and managing regenerated super memory blocks by checking, through the bad block pool, normal memory blocks included in the respective bad super memory blocks and then performing grouping in the type corresponding to the predetermined condition.

Abstract: A data storage device includes a nonvolatile memory device, and a controller configured to construct logical address sets each including a start logical address and valid address flags corresponding to the start logical address, from logical addresses provided from a host device, generate an address mapping table by mapping each of the logical address sets to a physical address of the nonvolatile memory device, and perform a request from the host device, by referring to the address mapping table.

Abstract: A data storage device includes a nonvolatile memory device; and a controller suitable for controlling an operation of the nonvolatile memory device based on a request from a host device, wherein the controller includes a first core activated in a normal mode and a second core activated in a standby mode.

Abstract: A memory system includes: a flash translation layer block suitable for receiving data from a host and converting a logic address into a physical address to store address information, during a write operation; a first buffer unit suitable for sequentially receiving the data from the flash translation layer; and a second buffer unit suitable for randomly receiving the data from the flash translation layer, wherein the flash translation layer block outputs data to only one of the first and second buffer units in a fast write mode during the write operation, and updates mapping information on the data stored in the one of the first and second buffer units after the fast write mode is terminated.

Abstract: A data storage device includes a nonvolatile memory device; and a controller suitable for controlling an operation of the nonvolatile memory device based on a request from a host device, wherein the controller includes a first core activated in a normal mode and a second core activated in a standby mode.

Abstract: A data storage device includes a nonvolatile memory apparatus including a plurality of memory areas, and a controller configured to randomize write data and generate random write data based on an offset value of a target memory area of the memory areas and a flag corresponding to the target memory area.

Abstract: A data processing system includes a data storage device including memory cells, which are erased to an erasure state and programmed to program states to store data, and a host device suitable for accessing the data, wherein the data storage device programs a first memory cell to a first state other than the erasure state to delete data of the first memory cell in response to a request of the host device.