Patents by Inventor Sooyeon Jeong

Sooyeon Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240085041
    Abstract: An air conditioner is provided that may include a case having an inlet and an outlet; a heat exchanger disposed inside of the case; a fan disposed inside of the case and elongated in a direction of a rotational axis of the fan; a guide that extends toward the outlet in a rotational direction of the fan; and a sterilizer mounted to the guide at a position facing the fan, and provided with a lamp that extends in a direction in which the fan extends, thereby providing a uniform sterilizing effect in a longitudinal direction of the fan.
    Type: Application
    Filed: September 13, 2023
    Publication date: March 14, 2024
    Inventors: Suhyeon JEONG, Sooyeon SHIN, Geunyoung PARK
  • Patent number: 11264482
    Abstract: A semiconductor device may include: a dummy gate structure including a first gate pattern in which dummy gate lines extending in one direction are connected to each other on a substrate, and a second gate pattern in which dummy gate lines extending in the one direction are connected to each other on the same line with the first gate pattern; and a third gate pattern extending in parallel with the dummy gate structure on one side of the dummy gate structure.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: March 1, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Donghyun Kim, Inhyun Song, Yeongmin Jeon, Sejin Park, Juyun Park, Jonghoon Baek, Taeyeon Shin, Sooyeon Jeong
  • Publication number: 20200343364
    Abstract: A semiconductor device may include: a dummy gate structure including a first gate pattern in which dummy gate lines extending in one direction are connected to each other on a substrate, and a second gate pattern in which dummy gate lines extending in the one direction are connected to each other on the same line with the first gate pattern; and a third gate pattern extending in parallel with the dummy gate structure on one side of the dummy gate structure.
    Type: Application
    Filed: September 17, 2019
    Publication date: October 29, 2020
    Inventors: Donghyun KIM, Inhyun SONG, Yeongmin JEON, Sejin PARK, Juyun PARK, Jonghoon BAEK, Taeyeon SHIN, Sooyeon JEONG
  • Patent number: 9559102
    Abstract: A semiconductor device includes first and second active regions. Each active region includes a plurality of fin protrusions and a recessed area disposed between the fin protrusions. A plurality of gate structures are disposed on each of the plurality of fin protrusions. A semiconductor layer is disposed in each recessed area. A distance between the gate structures of the first active region is the same as a distance between the gate structures of the second active region, and a height difference between a bottom surface of the semiconductor layer of the first recessed area and a top surface of each of the fin protrusions of the first active region is smaller than a height difference between a bottom surface of the semiconductor layer of the recessed area of the second active region and a top surface of each of the fin protrusions of the second active region.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: January 31, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yoonhae Kim, Myungil Kang, Sooyeon Jeong
  • Publication number: 20160307898
    Abstract: A semiconductor device includes first and second active regions. Each active region includes a plurality of fin protrusions and a recessed area disposed between the fin protrusions. A plurality of gate structures are disposed on each of the plurality of fin protrusions. A semiconductor layer is disposed in each recessed area. A distance between the gate structures of the first active region is the same as a distance between the gate structures of the second active region, and a height difference between a bottom surface of the semiconductor layer of the first recessed area and a top surface of each of the fin protrusions of the first active region is smaller than a height difference between a bottom surface of the semiconductor layer of the recessed area of the second active region and a top surface of each of the fin protrusions of the second active region.
    Type: Application
    Filed: December 21, 2015
    Publication date: October 20, 2016
    Inventors: Yoonhae KIM, Myungil KANG, Sooyeon JEONG
  • Publication number: 20140210017
    Abstract: A semiconductor device and a method of forming the semiconductor device includes: forming gate electrodes on a semiconductor substrate and forming spacers on both side surfaces of the gate electrodes; forming capping patterns on the gate electrodes; and forming a metal contact between the gate electrodes. Each of the capping patterns is formed to have a width greater than a width of each of the gate electrodes.
    Type: Application
    Filed: April 2, 2014
    Publication date: July 31, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Myeongcheol Kim, Sooyeon Jeong, Joon Goo Hong, Dohyoung Kim, Yongjin Kim, Jin Wook Lee, Yoonhae Kim
  • Patent number: 8716117
    Abstract: A semiconductor device and a method of forming the semiconductor device includes: forming gate electrodes on a semiconductor substrate and forming spacers on both side surfaces of the gate electrodes; forming capping patterns on the gate electrodes; and forming a metal contact between the gate electrodes. Each of the capping patterns is formed to have a width greater than a width of each of the gate electrodes.
    Type: Grant
    Filed: May 13, 2011
    Date of Patent: May 6, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myeongcheol Kim, Sooyeon Jeong, Joon Goo Hong, Dohyoung Kim, Yongjin Kim, Jin Wook Lee, Yoonhae Kim
  • Publication number: 20110281426
    Abstract: A semiconductor device and a method of forming the semiconductor device includes: forming gate electrodes on a semiconductor substrate and forming spacers on both side surfaces of the gate electrodes; forming capping patterns on the gate electrodes; and forming a metal contact between the gate electrodes. Each of the capping patterns is formed to have a width greater than a width of each of the gate electrodes.
    Type: Application
    Filed: May 13, 2011
    Publication date: November 17, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Myeongcheol Kim, Sooyeon Jeong, Joon Goo Hong, Dohyoung Kim, Yongjin Kim, Jin Wook Lee, Yoonhae Kim
  • Publication number: 20110215072
    Abstract: Provided is a method for controlling a plasma apparatus. The method includes measuring a plasma spectrum in a plasma chamber by an optical emission spectroscopy, setting a baseline of the measured plasma spectrum, normalizing the measured plasma spectrum by dividing a value of the measured plasma spectrum by a value of the baseline, and controlling the plasma chamber by setting parameters of a plasma process using the normalized plasma spectrum. A plasma apparatus is also provided.
    Type: Application
    Filed: March 7, 2011
    Publication date: September 8, 2011
    Inventors: Sangwuk PARK, Kye Hyun Baek, Yongjin Kim, Ho Ki Lee, Sooyeon Jeong, GeumJung Seong