Patents by Inventor Soo Young Choi

Soo Young Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220293793
    Abstract: Embodiments described herein provide thin film transistors (TFTs) and processes to reduce plasma induced damage in TFTs. In one embodiment, a buffer layer is disposed over a substrate and a semiconductor layer is disposed over the buffer layer. A gate dielectric layer is disposed over the semiconductor layer. The gate dielectric layer contacts the semiconductor layer at an interface. The gate electrode 204 is disposed over the gate dielectric layer. The gate dielectric layer has a Dit of about 5e10 cm?2eV?1 to about 5e11 cm?2eV?1 and a hysteresis of about 0.10 V to about 0.30 V improve performance capability of the TFT while having a breakdown field between about 6 MV/cm and about 10 MV/cm.
    Type: Application
    Filed: June 2, 2022
    Publication date: September 15, 2022
    Inventors: Jianheng LI, Lai ZHAO, Yujia ZHAI, Soo Young CHOI
  • Patent number: 11421053
    Abstract: A conjugated diene-based polymer catalyzed with a lanthanide rare earth element, and having high linearity and improved compounding properties, and a method for preparing the same are provided. The conjugated diene-based polymer catalyzed with a lanthanide rare earth element has high linearity, and if applied to a rubber composition, may show excellent processability, tensile strength and viscoelasticity.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: August 23, 2022
    Inventors: Su Hwa Kim, Hyo Jin Bae, Sung Ho Park, Soo Young Choi, Jeong Heon Ahn
  • Publication number: 20220260906
    Abstract: Provided herein are photoresist compositions and methods for fabricating semiconductor devices using the same. A photoresist composition may include an organometallic material, a fluorine-containing material, and an organic solvent.
    Type: Application
    Filed: May 4, 2022
    Publication date: August 18, 2022
    Inventors: CHAWON KOH, TSUNEHIRO NISHI, BRIAN CARDINEAU, SANGYOON WOO, JASON STOWERS, SOO YOUNG CHOI
  • Patent number: 11385735
    Abstract: An in-cell touch-type display panel includes an array substrate divided into a display area, a bezel area, and a pad area, gate lines, data lines and touch lines disposed in the display area of the array substrate, a data pad and a touch pad disposed in the pad area of the array substrate, and data link lines connecting the data lines to the data pad and the size of a bezel can be reduced by applying a dual link to data link lines using gate line metal and data line metal.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: July 12, 2022
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Hye-Jung Jin, Soo-Young Choi, Sun-Yong Lee
  • Patent number: 11384178
    Abstract: A conjugated diene-based polymer catalyzed with a lanthanide rare earth element, and having high linearity and improved compounding properties, and a method for preparing the same are provided. The conjugated diene-based polymer catalyzed with a lanthanide rare earth element has high linearity, and if applied to a rubber composition, may show excellent processability, tensile strength and viscoelasticity.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: July 12, 2022
    Inventors: Su Hwa Kim, Hyo Jin Bae, Sung Ho Park, Soo Young Choi, Jeong Heon Ahn
  • Patent number: 11380801
    Abstract: Embodiments described herein provide thin film transistors (TFTs) and processes to reduce plasma induced damage in TFTs. In one embodiment, a buffer layer is disposed over a substrate and a semiconductor layer is disposed over the buffer layer. A gate dielectric layer is disposed over the semiconductor layer. The gate dielectric layer contacts the semiconductor layer at an interface. The gate electrode is disposed over the gate dielectric layer. The gate dielectric layer has a Dit of about 5e10 cm?2 eV?1 to about 5e11 cm?2 eV?1 and a hysteresis of about 0.10 V to about 0.30 V improve performance capability of the TFT while having a breakdown field between about 6 MV/cm and about 10 MV/cm.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: July 5, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Jianheng Li, Lai Zhao, Yujia Zhai, Soo Young Choi
  • Publication number: 20220209134
    Abstract: Disclosed are a film and a photoelectric device including the compound of Chemical Formula 1 and configured to selectively absorb light in a blue wavelength region, and an image sensor and electronic device including the same: In Chemical Formula 1, each substituent is the same as defined in the detailed description.
    Type: Application
    Filed: December 30, 2021
    Publication date: June 30, 2022
    Applicants: Samsung Electronics Co., Ltd., Seoul National University, R&DB Foundation
    Inventors: Yeong Suk CHOI, Soo Young PARK, Sung Young YUN, Hyeong-Ju KIM, Min-Woo CHOI, Su-Yeon KIM, Jin Hong KIM, Seyoung JUNG
  • Patent number: 11327398
    Abstract: Provided herein are photoresist compositions and methods for fabricating semiconductor devices using the same. A photoresist composition may include an organometallic material, a fluorine-containing material, and an organic solvent.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: May 10, 2022
    Assignees: Samsung Electronics Co., Ltd., Inpria Corporation
    Inventors: Chawon Koh, Tsunehiro Nishi, Brian Cardineau, Sangyoon Woo, Jason Stowers, Soo Young Choi
  • Publication number: 20220130873
    Abstract: Embodiments of the disclosure generally provide methods of forming a capacitor layer or a gate insulating layer with high dielectric constant as well as low film current leakage and desired film qualities for display applications. In one embodiment, a thin film transistor structure includes a dielectric layer formed on a substrate, wherein the dielectric layer is a zirconium containing material comprising aluminum, and gate, source and drain electrodes formed on the substrate, wherein the gate, source and drain electrodes formed above or below the dielectric layer.
    Type: Application
    Filed: January 7, 2022
    Publication date: April 28, 2022
    Inventors: Xiangxin RUI, Lai ZHAO, Jrjyan Jerry CHEN, Soo Young CHOI, Yujia ZHAI
  • Patent number: 11312798
    Abstract: The present invention relates to a method of preparing a conjugated diene-based polymer by continuous polymerization using two or more reactors, and relates to a method of preparing a conjugated diene-based polymer which is capable of providing a conjugated diene-based polymer having improved Mooney viscosity and excellent cis 1,4 bond content and linearity, by controlling the injection amount of a conjugated diene-based monomer to each reactor in a specific ratio and resolving the deterioration phenomenon of physical properties, which might be generated in continuous reaction.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: April 26, 2022
    Inventors: Soo Young Choi, Suk Joon Yoo, Jeong Heon Ahn, Sung Ho Park, Suk Youn Kang
  • Patent number: 11270804
    Abstract: In a pressurized water reactor operation method, a fuel assembly including first fuel rods that operates for a preset first operation time and second fuel rods that operates for a second operation time longer than the first operation time is prepared. An operation schedule of a pressurized water reactor is created by mixing the first operation time of the first fuel rods and the second operation time of the second fuel rods. The pressurized water reactor operates by repeating the operation schedule.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: March 8, 2022
    Assignee: ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Deokjung Lee, Eun Jeong, Jiwon Choe, Soo Young Choi, Jinsu Park, Jaerim Jang, Peng Zhang
  • Publication number: 20220070763
    Abstract: A method for registering an electronic device in one embodiment includes broadcasting access information of an electronic device to be registered, receiving a request for communication connection based on the broadcast access information of the electronic device from a user terminal, transmitting a request for confirmation of a device corresponding to the received request for communication connection to the user terminal, receiving device confirmation information from the user terminal as a result of manipulation of a user, generating device authentication information based on the confirmation information, receiving access point (AP) access information from the user terminal, performing communication connection with an electronic-device managing server based on the received AP access information while transmitting identification information of the electronic device, and requesting registration of the device in a user account stored in the electronic-device managing server based on the transmitted identificati
    Type: Application
    Filed: August 24, 2021
    Publication date: March 3, 2022
    Inventor: Soo Young CHOI
  • Patent number: 11239258
    Abstract: Embodiments of the disclosure generally provide methods of forming a capacitor layer or a gate insulating layer with high dielectric constant as well as low film current leakage and desired film qualities for display applications. In one embodiment, a thin film transistor structure includes a dielectric layer formed on a substrate, wherein the dielectric layer is a zirconium containing material comprising aluminum, and gate, source and drain electrodes formed on the substrate, wherein the gate, source and drain electrodes formed above or below the dielectric layer.
    Type: Grant
    Filed: July 11, 2017
    Date of Patent: February 1, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Xiangxin Rui, Lai Zhao, Jrjyan Jerry Chen, Soo Young Choi, Yujia Zhai
  • Publication number: 20220013547
    Abstract: Embodiments of the disclosure generally provide methods of forming a hybrid film stack that may be used as a capacitor layer or a gate insulating layer with a high dielectric constant as well as film qualities for display applications. In one embodiment, a thin film transistor structure include gate, source and drain electrodes formed on a substrate, and an insulating layer formed on a substrate, wherein the insulating layer is a hybrid film stack having a dielectric layer comprising a zirconium containing material disposed on an interface layer formed above or below the gate, source and drain electrodes.
    Type: Application
    Filed: September 28, 2021
    Publication date: January 13, 2022
    Inventors: Xiangxin RUI, Lai ZHAO, Jrjyan Jerry CHEN, Soo Young CHOI, Yujia ZHAI
  • Publication number: 20220013670
    Abstract: Embodiments herein include thin-film transistors (TFTs) including channel layer stacks with layers having differing mobilities. The TFTs disclosed herein transport higher total current through both the low mobility and the high mobility channel layers due to higher carrier density in high mobility channel layer and/or the high mobility channel layers, which increases the speed of response of the TFTs. The TFTs further include a gate structure disposed over the channel layer stack. The gate structure includes one or more gate electrodes, and thus the TFTs are top-gate (TG), double-gate (DG), or bottom-gate (BG) TFTs. The channel layer stack includes a plurality of layers with differing mobilities. The layers with differing mobilities confer various benefits to the TFT. The high mobility layer increases the speed of response of the TFT.
    Type: Application
    Filed: June 4, 2020
    Publication date: January 13, 2022
    Inventors: Jung Bae KIM, Dong Kil YIM, Soo Young CHOI
  • Publication number: 20210376032
    Abstract: Disclosed herein is a sub-pixel circuit for a display device. The sub-pixel circuit has a driving TFT and at least one switching TFT. The at least one switching TFT is an oxide TFT. The sub-pixel circuit additionally has at least one storage capacitor wherein the storage capacitor has a capacitance between about 1 fF and about 55 fF.
    Type: Application
    Filed: July 21, 2021
    Publication date: December 2, 2021
    Inventors: Jung Bae KIM, Dong Kil YIM, Soo Young CHOI, Lai ZHAO
  • Patent number: 11189503
    Abstract: Disclosed are substrate drying methods, photoresist developing methods, and/or photolithography methods. The substrate drying method including providing a drying liquid on a substrate, increasing a pressure of the drying liquid to produce a supercritical fluid, and removing the supercritical fluid to dry the substrate may be provided.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: November 30, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Hoo Kim, Kuntack Lee, Yong-Jhin Cho, Chawon Koh, Sunghyun Park, Hyosan Lee, Ji Hoon Cha, Soo Young Choi
  • Publication number: 20210355240
    Abstract: A protein transduction domain and a fusion compound, which are more efficient, are proposed. As a result of selecting and testing a number of candidate peptides, the present inventors found that a GK1 peptide comprising 18 amino acids and a modified sequence obtained by replacing, adding, or deleting some sequences are bonded to high-molecular-weight materials such as proteins based on the basic sequence of the peptide, thus enabling the high-molecular-weight materials to smoothly penetrate into living bodies, for example, cells, tissues, or blood. A fusion compound, oligonucleotide, or vector using the same may be applied as a pharmaceutical composition for preventing or treating diseases.
    Type: Application
    Filed: October 30, 2020
    Publication date: November 18, 2021
    Inventors: Soo-Young CHOI, Jin-Seu PARK, Kyuhyung HAN, Keunwook LEE, Jong Kook PARK, Sunghou LEE, Sung Ho LEE, Soojung PARK, Won Sik EUM, Min Jea SHIN, Hyeon Ji YEO, Eun Ji YEO, Yeon Joo CHOI, Eun Jeong SOHN, Hyun Ju CHA, Hyun Jung KWON, Dae Won KIM
  • Patent number: 11145683
    Abstract: Embodiments of the disclosure generally provide methods of forming a hybrid film stack that may be used as a capacitor layer or a gate insulating layer with a high dielectric constant as well as film qualities for display applications. In one embodiment, a thin film transistor structure include gate, source and drain electrodes formed on a substrate, and an insulating layer formed on a substrate, wherein the insulating layer is a hybrid film stack having a dielectric layer comprising a zirconium containing material disposed on an interface layer formed above or below the gate, source and drain electrodes.
    Type: Grant
    Filed: July 12, 2017
    Date of Patent: October 12, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Xiangxin Rui, Lai Zhao, Jrjyan Jerry Chen, Soo Young Choi, Yujia Zhai
  • Publication number: 20210292894
    Abstract: Embodiments described herein generally relate to a substrate processing chamber, and more specifically to an apparatus and method for monitoring a cleaning processing for the substrate processing chamber. A processor receives one or more temperature readings from one or more sensors disposed in a substrate processing chamber. The processor determines a peak for each temperature reading from the one or more temperature readings, which indicate an end of exothermic film clean reaction. Upon determining that each temperature reading has peaked, the process issues a notification to cease the cleaning process.
    Type: Application
    Filed: August 18, 2017
    Publication date: September 23, 2021
    Applicants: Applied Materials, Inc., Applied Materials, Inc.
    Inventors: Fei PENG, Beom Soo PARK, Soo Young CHOI, Sanjay D. YADAV, Young-Jin CHOI, Himanshu JOSHI