Patents by Inventor Soo-Young Park

Soo-Young Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7268085
    Abstract: The present invention relates to a method for forming a storage node contact of a semiconductor device. The method includes the steps of: depositing sequentially a conductive layer, a nitride layer and a polysilicon layer on a substrate having an insulating structure and a conductive structure; etching selectively the polysilicon layer, the nitride layer and the conductive layer to form a plurality of conductive patterns with a stack structure of the conductive layer and a dual hard mask including the polysilicon layer and the nitride layer; forming an insulation layer along a profile containing the conductive patterns; and etching the insulation layer by using a line type photoresist pattern as an etch mask to form a contact hole exposing the conductive structure disposed between the neighboring conductive patterns.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: September 11, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventors: Yu-Chang Kim, Soo-Young Park
  • Patent number: 7232727
    Abstract: Disclosed is a method for fabricating a semiconductor device with a plurality of recessed channel regions. This method includes the steps of: forming a plurality of device isolation layers in a substrate; forming a hard mask nitride layer, a hard mask oxide layer and a hard mask polysilicon layer on the device isolation and the substrate, thereby obtaining a hard mask pattern; forming a plurality of trenches in the predetermined regions of the substrate with use of the hard mask pattern to expose a plurality of recessed channel regions; selectively removing the hard mask pattern; and forming a plurality of gate structures in the plurality of trenches.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: June 19, 2007
    Assignee: Hynix Semiconductor, Inc.
    Inventor: Soo-Young Park
  • Patent number: 7041779
    Abstract: A benzobisazole polymer having repeating units of the formula: wherein Q is and wherein Z is —O—, —S— or —NH—. A new method for preparing 1,5-naphthalenedicarboxylic acid from 1,5-diaminonaphthalene under relatively mild conditions in good yields is also described.
    Type: Grant
    Filed: January 12, 2004
    Date of Patent: May 9, 2006
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Thuy D. Dang, Narayanan Venkatasubramanian, Jar-Wha Lee, Soo-Young Park, Fred E. Arnold, Barry L. Farmer
  • Publication number: 20050250284
    Abstract: Disclosed is a method for fabricating a semiconductor device with a plurality of recessed channel regions. This method includes the steps of: forming a plurality of device isolation layers in a substrate; forming a hard mask nitride layer, a hard mask oxide layer and a hard mask polysilicon layer on the device isolation and the substrate, thereby obtaining a hard mask pattern; forming a plurality of trenches in the predetermined regions of the substrate with use of the hard mask pattern to expose a plurality of recessed channel regions; selectively removing the hard mask pattern; and forming a plurality of gate structures in the plurality of trenches.
    Type: Application
    Filed: December 22, 2004
    Publication date: November 10, 2005
    Inventor: Soo-Young Park
  • Publication number: 20040238482
    Abstract: The present invention relates to a method for forming a storage node contact of a semiconductor device. The method includes the steps of: depositing sequentially a conductive layer, a nitride layer and a polysilicon layer on a substrate having an insulating structure and a conductive structure; etching selectively the polysilicon layer, the nitride layer and the conductive layer to form a plurality of conductive patterns with a stack structure of the conductive layer and a dual hard mask including the polysilicon layer and the nitride layer; forming an insulation layer along a profile containing the conductive patterns; and etching the insulation layer by using a line type photoresist pattern as an etch mask to form a contact hole exposing the conductive structure disposed between the neighboring conductive patterns.
    Type: Application
    Filed: December 30, 2003
    Publication date: December 2, 2004
    Applicant: Hynix Semiconductor Inc.
    Inventors: Yu-Chang Kim, Soo-Young Park
  • Patent number: 6465293
    Abstract: A method of manufacturing a flash memory cell is disclosed. The method comprises the steps of forming an oxide film on a semiconductor substrate in which a device separation film is formed and then patterning the oxide film to expose the semiconductor substrate at a portion in which a floating gate will be formed; sequentially forming a tunnel oxide film and a first polysilicon layer on the entire structure, and then flattening the first polysilicon layer until the tunnel oxide film is exposed to form a floating gate; etching the tunnel oxide film and the oxide film in the exposed portion to a given thickness and the forming a dielectric film on the entire structure; sequentially forming a second polysilicon layer, a tungsten silicide layer and a hard mask and then patterning them to form a control gate; and injecting impurity ions into the semiconductor substrate at the both sides of the floating gate to form a junction region.
    Type: Grant
    Filed: June 15, 2001
    Date of Patent: October 15, 2002
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Soo Young Park, Jung II Cho
  • Publication number: 20020001898
    Abstract: A method of manufacturing a flash memory cell is disclosed. The method comprises the steps of forming an oxide film on a semiconductor substrate in which a device separation film is formed and then patterning the oxide film to expose the semiconductor substrate at a portion in which a floating gate will be formed; sequentially forming a tunnel oxide film and a first polysilicon layer on the entire structure, and then flattening the first polysilicon layer until the tunnel oxide film is exposed to form a floating gate; etching the tunnel oxide film and the oxide film in the exposed portion to a given thickness and the forming a dielectric film on the entire structure; sequentially forming a second polysilicon layer, a tungsten silicide layer and a hard mask and then patterning them to form a control gate; and injecting impurity ions into the semiconductor substrate at the both sides of the floating gate to form a junction region.
    Type: Application
    Filed: June 15, 2001
    Publication date: January 3, 2002
    Inventors: Soo Young Park, Jung Il Cho
  • Patent number: 5823485
    Abstract: Disclosed is an automatically foldable support stand for a golf bag. The support stand includes a pair of legs and a V-shaped elastic rod adapted to move the legs between spread position and retracted position according to the movement of a bag body between its tiled position and its upright position. A free end of the elastic rod is engaged with an engagement groove of a base plate. An elasticity enforcing part integrally formed to the base plate is engaged with the elastic rod thereby substantially shortening a coincidence point of the V-shaped elastic rod. A guide shoe attached at a lower position of the golf bag penetrates through a guide block which is vertically extended from the base plate whereby a movement of the base plate is guided along a path controlled by the guide shoe.
    Type: Grant
    Filed: January 11, 1996
    Date of Patent: October 20, 1998
    Assignee: Min-Jae Chun
    Inventor: Soo-Young Park
  • Patent number: D584738
    Type: Grant
    Filed: September 19, 2007
    Date of Patent: January 13, 2009
    Assignee: LG Electronics Inc.
    Inventors: Hyoung Won Kim, Soo Young Park