Abstract: An liquid crystal display device includes a source line between first and second drain lines, a first and second gate lines between the first drain line and the source line and between the second drain line and the source line, a plurality of first and second drain electrodes extending from the first and second drain lines, and a plurality of first and second source electrodes extending in first and second directions from the source line, wherein the plurality of first source electrodes are alternated with the plurality of first drain electrodes on the first gate line, and the plurality of second source electrodes are alternated with the plurality of second drain electrodes on the second gate line.

Abstract: A stent may comprise a plurality of serpentine bands, wherein adjacent serpentine bands are connected by at least one connector strut. A serpentine band may comprise alternating straight struts and s-shaped struts. Connector struts may comprise first connector struts and second connector struts, wherein the first connector struts are nonparallel to the second connector struts.

Abstract: A liquid crystal display panel having a built in driving circuit according to the present invention includes liquid crystal cells arranged in a matrix form in a display area of the panel and a driving circuit disposed outside the display area in a non-display area to drive the liquid crystal cells. The liquid crystal display panel also includes a plurality of LOG-type signal lines disposed at a LOG area within the non-display area to supply a plurality of signals to the driving circuit. In addition, the liquid crystal display panel includes a black matrix disposed in the non-display area excluding the LOG area so that the black matrix is absent in the LOG area.

Abstract: A liquid crystal display device is disclosed which includes first, second and third data lines arranged in one direction, a data driver for alternately supplying a data signal of a first polarity and a data signal of a second polarity to each of the first, second and third data lines during an interval of two horizontal periods, first and second gate lines arranged to cross the first to third data lines, a gate driver for sequentially driving the first and second gate lines, and first red, first green, first blue, second red, second green and second blue pixels located between the first gate line and the second gate line and arranged in order along the first and second gate lines. The first red pixel cell is connected to one side of the first data line and the second gate line. The first green pixel cell is connected to the other side of the first data line and the first gate line. The first blue pixel cell is connected to one side of the second data line and the first gate line.

Abstract: A shift register structure comprising a shift register for sequentially outputting voltages as a clock signal and a start voltage are inputted thereto, and a cleaner means connected to the shift register for removing noise within the start voltage. The cleaner means is a transistor for inputting a clock signal to a gate and for inputting a signal outputted from the shift register to a source.

Abstract: A shift register which is capable of performing bi-directional scanning is disclosed. The shift register includes first and second voltage input lines to which first and second voltages are input, respectively with the phases of the first and second voltages being opposite to each other; a plurality of stages dependently connected to a plurality of clock signal input lines which input a plurality of clock signals whose phases are sequentially delayed, wherein each stage includes: a scan direction controller to selectively output the first and second voltages thereto, according to first and second start pulses, and for controlling scan direction, a node controller to control voltages of first and second nodes according to a signal output from the scan direction controller, and an output unit to output a clock signal from one of the plurality of clock signal input lines thereto according to the voltage of each of the first and second nodes.

Abstract: An LCD device includes at least one data line, a plurality of first pixel cells connected in common to one side of the data line, a timing controller for alternately outputting first and second-polarity data signals at intervals of at least two successive periods, a data modulator for outputting the first and second-polarity data signals supplied from the timing controller, the data modulator modulating a grayscale value of one of the first and second-polarity data signals respectively supplied in two successive periods from the timing controller, and outputting the modulated data signal, and a data driver for receiving the first and second-polarity data signals from the data modulator, and alternately outputting the first and second-polarity data signals at intervals of at least two successive periods, to supply the first and second-polarity data signals to the data line.

Abstract: A gate driver and a repairing method are disclosed, wherein the gate driver is provided with one or more plurality of auxiliary stages that can substitute for a disabled stage, the gate driver including a shift register provided with a plurality of first output lines; at least three output repairing lines arranged across the first output lines; at least two clock transmission lines to transmit at least two clock pulses of different phases; at least one clock repairing line arranged across the clock transmission lines; and at least one auxiliary stage connected to the output repairing lines and to the at least one clock repairing line.

Abstract: Devices and methods for transferring forces down a catheter shaft while also maintaining an open fluid pathway are disclosed. In some of the designs, inner and outer members of the catheter interact, allowing improved transfer of forces down the catheter shaft. These designs also allow for maintenance of a fluid pathway along the length of the shaft, including at locations where the inner and outer members are interacting with one another. Structures are disclosed which extend at least a portion of the length of the shaft, allowing improved force transfer and resistance to kinking. Structures are also disclosed which specifically allow for inner and outer members to engage one another at at least one point along the shaft, improving the transfer of forces down the shaft.

Abstract: A stent may comprise a plurality of serpentine bands, wherein adjacent serpentine bands are connected by at least one connector strut. A serpentine band may comprise alternating straight struts and s-shaped struts. Connector struts may comprise first connector struts and second connector struts, wherein the first connector struts are nonparallel to the second connector struts.

Abstract: Medical devices such as catheters can include structure or provision that permit a physician or other health care professional to adjust the stiffness of at least a portion of the medical device. In some instances, the medical device may be adjusted prior to inserting the medical device into a patient. In some cases, the medical device may be adjusted while in use within the patient.

Abstract: An organic light emitting diode (OLED) display device for reducing the number of lines of an organic light emitting diode panel is provided. The OLED display device includes first and second data lines; a power voltage supply line supplied with a power supply voltage; a gate line crossing the first data line, the second data line and the power voltage supply line; first and second organic light emitting diodes commonly connected to the power voltage supply line; a first organic light emitting diode driving circuit for driving the first organic light emitting diode with a data voltage from the first data line in response to a scanning signal from the gate line; and a second organic light emitting diode driving circuit for driving the second organic light emitting diode with a data voltage from the second data line in response to the scanning signal from the gate line.

Abstract: A shift register structure comprising a shift register for sequentially outputting voltages as a clock signal and a start voltage are inputted thereto, and a cleaner means connected to the shift register for removing noise within the start voltage. The cleaner means is a transistor for inputting a clock signal to a gate and for inputting a signal outputted from the shift register to a source.

Abstract: A liquid crystal display (LCD) device comprises a liquid crystal panel having a plurality of pixel regions defined by a plurality of gate lines and data lines, each pixel region associated with a thin film transistor, a gate driving unit having an amorphous semiconductor and integrally formed with the liquid crystal panel capable of sending a scan signal to the gate lines having a pulse width longer than a turned on time of the thin film transistor located within the pixel region, and a data driving unit connected to the data lines capable of sending an image signal to the data lines.

Abstract: A driving circuit for a flat panel display device includes shift register stages, each containing: a first TFT charging a Q node according to a start signal; a second TFT discharging the Q node according to an output voltage of a next shift register stage; a pull-up unit increasing an output voltage according to the Q node voltage; an odd pull-down unit decreasing the output voltage in an odd frame according to a QB-o node voltage; and an even pull-down unit decreasing the output voltage in an even frame according to a QB-e node voltage. A gate and drain of a third odd TFT connected to the QB-o node are connected to each other and receive an odd source voltage. A gate and drain of the third even TFT connected to the QB-e node are connected to each other and receive an even source voltage.

Abstract: The present invention is related to a method of crystallizing an amorphous silicon layer and a crystallizing apparatus thereof which crystallize an amorphous silicon layer using plasma. The present invention includes the steps of depositing an inducing substance for silicon crystallization on an amorphous silicon layer by plasma exposure, and carrying out annealing on the amorphous silicon layer to the amorphous silicon layer. The present invention includes a chamber having an inner space, a substrate support in the chamber wherein the substrate support supports a substrate, a plasma generating means in the chamber wherein the plasma generating means produces plasma inside the chamber, and a heater at the substrate support wherein the heater supplies the substrate with heat.

Abstract: A driving circuit for a flat panel display device includes a generation unit for generating n-phase form generation clocks; and a plurality of shift register stages for sequentially generating a plurality gate signals to a plurality of gate lines using the n-phase form generation clocks, one of the shift register stage including first and second output terminals for outputting first and second switching signals, respectively, using an output signal of one of the preceding shift register stages and an output signal of one of the subsequent shift register stages; a first transistor connected to the first output terminal for receiving one of the n-phase form generation clocks; and a second transistor connected to the second output terminal and the first transistor, wherein each gate line is connected to a node between the first and second transistors.

Abstract: A driving circuit for a flat panel display device includes first and second generation units generating m-phase circulation enable control clocks and n-phase circulation form generation clocks; and a plurality of shift register stages generating output signals by using the m-phase circulation enable control clocks and the n-phase circulation form generation clocks. Each shift register stage includes an input terminal receiving the m-phase circulation enable control clocks; first and second nodes outputting first and second signals, respectively, using the m-phase circulation enable control clocks; a first transistor connected to the first node and receiving the n-phase circulation form generation clocks; a second transistor connected to the second node and the first transistor; and an output terminal between the first and second transistors and outputting one of the output signals.

Abstract: An liquid crystal display device includes a source line between first and second drain lines, a first and second gate lines between the first drain line and the source line and between the second drain line and the source line, a plurality of first and second drain electrodes extending from the first and second drain lines, and a plurality of first and second source electrodes extending in first and second directions from the source line, wherein the plurality of first source electrodes are alternated with the plurality of first drain electrodes on the first gate line, and the plurality of second source electrodes are alternated with the plurality of second drain electrodes on the second gate line.

Abstract: A liquid crystal display device includes a driving circuit provided with a switching device on a liquid crystal display panel, the switching device including a plurality of thin film transistors connected in parallel and commonly interconnected using a gate electrode.