Patents by Inventor Sook-Hwan BAN

Sook-Hwan BAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240049573
    Abstract: A display device includes: a light emitting element; a first inorganic encapsulation layer disposed on the light emitting element to cover the light emitting element, and including a first encapsulation layer, a plasma treatment layer disposed on the first encapsulation layer, and a second encapsulation layer disposed on the plasma treatment layer; an organic encapsulation layer disposed on the first inorganic encapsulation layer; and a second inorganic encapsulation layer disposed on the organic encapsulation layer.
    Type: Application
    Filed: April 28, 2023
    Publication date: February 8, 2024
    Inventors: JONGHYUN PARK, SOOK-HWAN BAN, JUNGHYUK CHO, HYO-JUN KIM, JAE-BANG YU, DEOKCHAN YOON, JAESUNG LEE, DONGUK CHOI
  • Patent number: 11078571
    Abstract: A deposition apparatus includes a chamber, a deposition source, and a stage disposed in the chamber with a target object mounted thereon. The deposition apparatus further includes a first plate coupled to the chamber, and a second plate disposed between the first plate and the stage, wherein the second plate includes a plurality of diffusion holes. The deposition apparatus additionally includes a heat dissipation member in contact with the first plate and the second plate, wherein the heat dissipation member includes a plurality of sidewall portions, wherein the plurality of sidewall portions are connected to each other. The deposition apparatus further includes a spacer coupled to a first sidewall portion of the plurality of sidewall portions and disposed between the first plate and the second plate, wherein the spacer extends parallel to the first sidewall portion.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: August 3, 2021
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jongho Park, Sook-hwan Ban, Jinoh Song, Hyeongsuk Yoo
  • Publication number: 20200190668
    Abstract: A deposition apparatus includes a chamber, a deposition source, and a stage disposed in the chamber with a target object mounted thereon. The deposition apparatus further includes a first plate coupled to the chamber, and a second plate disposed between the first plate and the stage, wherein the second plate includes a plurality of diffusion holes. The deposition apparatus additionally includes a heat dissipation member in contact with the first plate and the second plate, wherein the heat dissipation member includes a plurality of sidewall portions, wherein the plurality of sidewall portions are connected to each other. The deposition apparatus further includes a spacer coupled to a first sidewall portion of the plurality of sidewall portions and disposed between the first plate and the second plate, wherein the spacer extends parallel to the first sidewall portion.
    Type: Application
    Filed: December 10, 2019
    Publication date: June 18, 2020
    Inventors: Jongho PARK, Sook-hwan BAN, Jinoh SONG, Hyeongsuk YOO
  • Patent number: 9893203
    Abstract: One or more exemplary embodiments disclose a thin film transistor array panel and a manufacturing method thereof including a substrate, a gate line on the substrate, the gate line including a gate electrode, a gate insulating layer on the gate electrode, a semiconductor layer on the gate insulating layer, and the semiconductor layer including an oxide semiconductor, a data wire layer above the semiconductor layer, the data wire layer including a data line, a source electrode coupled to the data line, and a drain electrode facing the source electrode, and a metal phosphorus oxide layer configured to cover the source electrode and the drain electrode.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: February 13, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Seok Hwan Bang, Sook-Hwan Ban, Hyung Jun Kim, Woo Geun Lee, Hyeon Jun Lee
  • Publication number: 20170110591
    Abstract: One or more exemplary embodiments disclose a thin film transistor array panel and a manufacturing method thereof including a substrate, a gate line on the substrate, the gate line including a gate electrode, a gate insulating layer on the gate electrode, a semiconductor layer on the gate insulating layer, and the semiconductor layer including an oxide semiconductor, a data wire layer above the semiconductor layer, the data wire layer including a data line, a source electrode coupled to the data line, and a drain electrode facing the source electrode, and a metal phosphorus oxide layer configured to cover the source electrode and the drain electrode.
    Type: Application
    Filed: August 24, 2016
    Publication date: April 20, 2017
    Inventors: Seok Hwan BANG, Sook-Hwan BAN, Hyung Jun KIM, Woo Geun LEE, Hyeon Jun LEE