Patents by Inventor Sook Woon Chan

Sook Woon Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220005778
    Abstract: A method for fabricating a semiconductor device with a heterogeneous solder joint includes: providing a semiconductor die; providing a coupled element; and soldering the semiconductor die to the coupled element with a first solder joint. The first solder joint includes: a solder material including a first metal composition; and a coating including a second metal composition, different from the first metal composition, the coating at least partially covering the solder material. The second metal composition has a greater stiffness and/or a higher melting point than the first metal composition.
    Type: Application
    Filed: June 29, 2021
    Publication date: January 6, 2022
    Inventors: Swee Kah Lee, Sook Woon Chan, Fong Mei Lum, Joachim Mahler, Muhammad Muhammat Sanusi
  • Patent number: 11174152
    Abstract: An embodiment device includes a body structure having an interior cavity, a control chip disposed on a first interior surface of the interior cavity, and a sensor attached, at a first side, to a second interior surface of the interior cavity opposite the first interior surface. The sensor has a mounting pad on a second side of the sensor that faces the first interior surface, and the sensor is vertically spaced apart from the control chip by an air gap, with the sensor is aligned at least partially over the control chip. The device further includes an interconnect having a first end mounted on the mounting pad, the interconnect extending through the interior cavity toward the first interior surface, and the control chip is in electrical communication with the sensor by way of the interconnect.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: November 16, 2021
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Sook Woon Chan, Chau Fatt Chiang, Kok Yau Chua, Swee Kah Lee, Chee Yang Ng
  • Patent number: 11081417
    Abstract: A method of manufacturing a package, comprising embedding the semiconductor chip with an encapsulant comprising a transition metal in a concentration in a range between 10 ppm and 10,000 ppm; selectively converting of a part of the transition metal, such that the electrical conductivity of the encapsulant increases; and plating the converted part of the encapsulant with an electrically conductive material.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: August 3, 2021
    Assignee: Infineon Technologies AG
    Inventors: Sook Woon Chan, Chau Fatt Chiang, Kok Yau Chua, Soon Lock Goh, Swee Kah Lee, Joachim Mahler, Mei Chin Ng, Beng Keh See, Guan Choon Matthew Nelson Tee
  • Publication number: 20200048075
    Abstract: An embodiment device includes a body structure having an interior cavity, a control chip disposed on a first interior surface of the interior cavity, and a sensor attached, at a first side, to a second interior surface of the interior cavity opposite the first interior surface. The sensor has a mounting pad on a second side of the sensor that faces the first interior surface, and the sensor is vertically spaced apart from the control chip by an air gap, with the sensor is aligned at least partially over the control chip. The device further includes an interconnect having a first end mounted on the mounting pad, the interconnect extending through the interior cavity toward the first interior surface, and the control chip is in electrical communication with the sensor by way of the interconnect.
    Type: Application
    Filed: October 22, 2019
    Publication date: February 13, 2020
    Inventors: Sook Woon Chan, Chau Fatt Chiang, Kok Yau Chua, Swee Kah Lee, Chee Yang Ng
  • Patent number: 10501312
    Abstract: An embodiment device includes a body structure having an interior cavity, a control chip disposed on a first interior surface of the interior cavity, and a sensor attached, at a first side, to a second interior surface of the interior cavity opposite the first interior surface. The sensor has a mounting pad on a second side of the sensor that faces the first interior surface, and the sensor is vertically spaced apart from the control chip by an air gap, with the sensor is aligned at least partially over the control chip. The device further includes an interconnect having a first end mounted on the mounting pad, the interconnect extending through the interior cavity toward the first interior surface, and the control chip is in electrical communication with the sensor by way of the interconnect.
    Type: Grant
    Filed: July 18, 2017
    Date of Patent: December 10, 2019
    Assignee: Infineon Technologies AG
    Inventors: Sook Woon Chan, Chau Fatt Chiang, Kok Yau Chua, Swee Kah Lee, Chee Yang Ng
  • Patent number: 10490470
    Abstract: A method of fabricating a semiconductor package comprises providing a carrier, fabricating an opening in the carrier, attaching a semiconductor chip to the carrier and fabricating an encapsulation body covering the semiconductor chip.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: November 26, 2019
    Assignee: Infineon Technologies AG
    Inventors: Hock Heng Chong, Sook Woon Chan, Chau Fatt Chiang, Khar Foong Chung, Chee Hong Fang, Muhammat Sanusi Muhammad, Mei Chin Ng, Yean Seng Ng, Pei Luan Pok, Choon Huey Wang
  • Publication number: 20190341324
    Abstract: A method of manufacturing a package, comprising embedding the semiconductor chip with an encapsulant comprising a transition metal in a concentration in a range between 10 ppm and 10,000 ppm; selectively converting of a part of the transition metal, such that the electrical conductivity of the encapsulant increases; and plating the converted part of the encapsulant with an electrically conductive material.
    Type: Application
    Filed: July 17, 2019
    Publication date: November 7, 2019
    Inventors: Sook Woon CHAN, Chau Fatt CHIANG, Kok Yau CHUA, Soon Lock GOH, Swee Kah LEE, Joachim MAHLER, Mei Chin NG, Beng Keh SEE, Guan Choon Matthew Nelson TEE
  • Patent number: 10396007
    Abstract: A package which comprises a first encapsulant configured so that electrically conductive material is plateable thereon, and a second encapsulant configured so that electrically conductive material is not plateable thereon.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: August 27, 2019
    Assignee: Infineon Technologies AG
    Inventors: Sook Woon Chan, Chau Fatt Chiang, Kok Yau Chua, Soon Lock Goh, Swee Kah Lee, Joachim Mahler, Mei Chin Ng, Beng Keh See, Guan Choon Matthew Nelson Tee
  • Publication number: 20190023561
    Abstract: An embodiment device includes a body structure having an interior cavity, a control chip disposed on a first interior surface of the interior cavity, and a sensor attached, at a first side, to a second interior surface of the interior cavity opposite the first interior surface. The sensor has a mounting pad on a second side of the sensor that faces the first interior surface, and the sensor is vertically spaced apart from the control chip by an air gap, with the sensor is aligned at least partially over the control chip. The device further includes an interconnect having a first end mounted on the mounting pad, the interconnect extending through the interior cavity toward the first interior surface, and the control chip is in electrical communication with the sensor by way of the interconnect.
    Type: Application
    Filed: July 18, 2017
    Publication date: January 24, 2019
    Inventors: Sook Woon Chan, Chau Fatt Chiang, Kok Yau Chua, Swee Kah Lee, Chee Yang Ng
  • Publication number: 20180174935
    Abstract: A method of fabricating a semiconductor package comprises providing a carrier, fabricating an opening in the carrier, attaching a semiconductor chip to the carrier and fabricating an encapsulation body covering the semiconductor chip.
    Type: Application
    Filed: December 12, 2017
    Publication date: June 21, 2018
    Inventors: Hock Heng CHONG, Sook Woon CHAN, Chau Fatt CHIANG, Khar Foong CHUNG, Chee Hong FANG, Muhammat Sanusi MUHAMMAD, Mei Chin NG, Yean Seng NG, Pei Luan POK, Choon Huey WANG
  • Publication number: 20170256472
    Abstract: A package which comprises a first encapsulant configured so that electrically conductive material is plateable thereon, and a second encapsulant configured so that electrically conductive material is not plateable thereon.
    Type: Application
    Filed: March 2, 2017
    Publication date: September 7, 2017
    Inventors: Sook Woon CHAN, Chau Fatt CHIANG, Kok Yau CHUA, Soon Lock GOH, Swee Kah LEE, Joachim MAHLER, Mei Chin NG, Beng Keh SEE, Guan Choon Matthew Nelson TEE
  • Patent number: 9475691
    Abstract: A semiconductor package includes an electrically conductive lead-frame, including a first die paddle having a first opening, and a plurality of electrically conductive leads, a ridge formed around a perimeter of the first opening, and an electrically insulating molding compound. The electrically insulating molding compound includes an interior cavity being defined by a planar base surface and outer sidewalls, a second opening formed in the base surface, and an interior sidewall within the interior cavity. The molding compound is formed around the lead-frame with the first die paddle in the interior cavity. The first and second openings are aligned with one another so as to form a port that provides access to the interior cavity. The ridge and the interior sidewall form a dam that is configured to collect liquefied sealant and prevent the liquefied sealant from overflowing into the port or into adjacent regions of the interior cavity.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: October 25, 2016
    Assignee: Infineon Technologies AG
    Inventors: Kok Yau Chua, Sook Woon Chan, Chau Fatt Chiang, Stefan Martens, Matthias Steiert, Kian Hong Yeo, Hock Siang Chua, Mei Chin Ng, Swee Kah Lee