Patents by Inventor SooMoon Park
SooMoon Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230011039Abstract: A display device includes a light guide plate; an input grating on a first surface of the light guide plate and configured to generate a diffracted transmission beam; an output grating on the first surface of the light guide plate and spaced apart from the input grating, wherein the output grating is configured to generate a first output beam emitted from the light guide plate; and an optical efficiency enhancement layer on a second surface of the light guide plate and overlapping at least one of the input grating and the output grating in a traveling direction of the input beam, the second surface being opposite to the first surface.Type: ApplicationFiled: June 14, 2022Publication date: January 12, 2023Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sangwoo Ha, Tetsuo Ariyoshi, Soomoon Park, Ilseop Won, Jongpil Won
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Publication number: 20230011557Abstract: Provided is a display device including a light guide plate; a reflective prism configured to reflect an imaging beam toward the light guide plate, wherein the imaging beam reflected by the reflective prism travels within the light guide plate at an angle greater than a critical angle of the light guide plate; and a diffraction grating configured to diffract the imaging beam traveling within the light guide plate to an angle less than or equal to the critical angle of the light guide plate, wherein the reflective prism includes a first surface in contact with the light guide plate, and a second surface configured to reflect the imaging beam.Type: ApplicationFiled: March 18, 2022Publication date: January 12, 2023Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Soomoon PARK, Tetsuo ARIYOSHI, Ilseop WON, Jongpil WON, Sangwoo HA
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Publication number: 20230008461Abstract: An optical device for exit pupil expansion (EPE) for improving a field of view (FOV) and luminance uniformity, and a display apparatus including the same are provided. The optical device includes: an input part into which a virtual image is input; and an EPE part configured to receive the virtual image from the input part, perform one-dimensional (1D) EPE and two-dimensional (2D) EPE to combine the virtual image with an external real image, and output the combined image.Type: ApplicationFiled: January 28, 2022Publication date: January 12, 2023Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sangwoo HA, Tetsuo Ariyoshi, Heejin Kim, Soomoon Park, Jongpil Won
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Patent number: 8785251Abstract: A semiconductor device has a semiconductor die mounted over a surface of a substrate. A mold underfill dispensing needle has a width substantially equal to a width of the semiconductor die. The dispensing needle is placed in fluid communication with a side of the semiconductor die. A mold underfill is deposited from an outlet of the dispensing needle evenly across a width of the semiconductor die into an area between the semiconductor die and substrate without motion of the dispensing needle. The dispensing needle has a shank and the outlet in a T-configuration. The dispensing needle can have a plurality of pole portions between a shank and the outlet. The dispensing needle has a plate between a shank and the outlet. The outlet has an upper edge with a length substantially equal to or greater than a length of a lower edge of the outlet.Type: GrantFiled: September 9, 2013Date of Patent: July 22, 2014Assignee: STATS ChipPAC, Ltd.Inventors: SooMoon Park, ByoungWook Jang, DongSoo Moon
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Patent number: 8692365Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a base substrate; attaching a package stack assembly, having a contact pad, on the base substrate; applying an encapsulation having a cavity with a tapered side directly over the package stack assembly, the contact pad exposed in the cavity; attaching a recessed circuitry unit in the cavity and on the contact pad, a chamber of the cavity formed by the recessed circuitry unit and the tapered side of the cavity; and mounting a thermal structure over the recessed circuitry unit, the cavity, and the encapsulation.Type: GrantFiled: June 17, 2011Date of Patent: April 8, 2014Assignee: Stats Chippac Ltd.Inventors: DongSoo Moon, Taewoo Lee, Soo-San Park, SooMoon Park, Sang-Ho Lee
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Publication number: 20140004659Abstract: A semiconductor device has a semiconductor die mounted over a surface of a substrate. A mold underfill dispensing needle has a width substantially equal to a width of the semiconductor die. The dispensing needle is placed in fluid communication with a side of the semiconductor die. A mold underfill is deposited from an outlet of the dispensing needle evenly across a width of the semiconductor die into an area between the semiconductor die and substrate without motion of the dispensing needle. The dispensing needle has a shank and the outlet in a T-configuration. The dispensing needle can have a plurality of pole portions between a shank and the outlet. The dispensing needle has a plate between a shank and the outlet. The outlet has an upper edge with a length substantially equal to or greater than a length of a lower edge of the outlet.Type: ApplicationFiled: September 9, 2013Publication date: January 2, 2014Applicant: STATS ChipPAC, Ltd.Inventors: SooMoon Park, ByoungWook Jang, DongSoo Moon
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Patent number: 8569895Abstract: A semiconductor device has a semiconductor die mounted over a surface of a substrate. A mold underfill dispensing needle has a width substantially equal to a width of the semiconductor die. The dispensing needle is placed in fluid communication with a side of the semiconductor die. A mold underfill is deposited from an outlet of the dispensing needle evenly across a width of the semiconductor die into an area between the semiconductor die and substrate without motion of the dispensing needle. The dispensing needle has a shank and the outlet in a T-configuration. The dispensing needle can have a plurality of pole portions between a shank and the outlet. The dispensing needle has a plate between a shank and the outlet. The outlet has an upper edge with a length substantially equal to or greater than a length of a lower edge of the outlet.Type: GrantFiled: April 27, 2012Date of Patent: October 29, 2013Assignee: STATS ChipPAC, Ltd.Inventors: SooMoon Park, ByoungWook Jang, DongSoo Moon
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Publication number: 20120319267Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a base substrate; attaching a package stack assembly, having a contact pad, on the base substrate; applying an encapsulation having a cavity with a tapered side directly over the package stack assembly, the contact pad exposed in the cavity; attaching a recessed circuitry unit in the cavity and on the contact pad, a chamber of the cavity formed by the recessed circuitry unit and the tapered side of the cavity; and mounting a thermal structure over the recessed circuitry unit, the cavity, and the encapsulation.Type: ApplicationFiled: June 17, 2011Publication date: December 20, 2012Inventors: DongSoo Moon, Taewoo Lee, Soo-San Park, SooMoon Park, Sang-Ho Lee
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Publication number: 20120211904Abstract: A semiconductor device has a semiconductor die mounted over a surface of a substrate. A mold underfill dispensing needle has a width substantially equal to a width of the semiconductor die. The dispensing needle is placed in fluid communication with a side of the semiconductor die. A mold underfill is deposited from an outlet of the dispensing needle evenly across a width of the semiconductor die into an area between the semiconductor die and substrate without motion of the dispensing needle. The dispensing needle has a shank and the outlet in a T-configuration. The dispensing needle can have a plurality of pole portions between a shank and the outlet. The dispensing needle has a plate between a shank and the outlet. The outlet has an upper edge with a length substantially equal to or greater than a length of a lower edge of the outlet.Type: ApplicationFiled: April 27, 2012Publication date: August 23, 2012Applicant: STATS CHIPPAC, LTD.Inventors: SooMoon Park, ByoungWook Jang, DongSoo Moon
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Patent number: 8193036Abstract: A semiconductor device has a semiconductor die mounted over a surface of a substrate. A mold underfill dispensing needle has a width substantially equal to a width of the semiconductor die. The dispensing needle is placed in fluid communication with a side of the semiconductor die. A mold underfill is deposited from an outlet of the dispensing needle evenly across a width of the semiconductor die into an area between the semiconductor die and substrate without motion of the dispensing needle. The dispensing needle has a shank and the outlet in a T-configuration. The dispensing needle can have a plurality of pole portions between a shank and the outlet. The dispensing needle has a plate between a shank and the outlet. The outlet has an upper edge with a length substantially equal to or greater than a length of a lower edge of the outlet.Type: GrantFiled: September 14, 2010Date of Patent: June 5, 2012Assignee: STATS ChipPAC, Ltd.Inventors: SooMoon Park, ByoungWook Jang, DongSoo Moon
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Patent number: 8143096Abstract: An integrated circuit package system includes: providing a substrate having a top side with a trace conductor connected to a bottom side with a system interconnect; forming a bump ring on the substrate, the bump ring having an inner cavity area over the trace conductor and an outer bump area; applying a substrate mask layer adjacent a perimeter of the outer bump area; connecting a device to the trace conductor below the bump ring; and applying a compound between the device and the substrate.Type: GrantFiled: August 19, 2008Date of Patent: March 27, 2012Assignee: STATS ChipPAC Ltd.Inventors: SooMoon Park, KyungHoon Lee
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Publication number: 20120061858Abstract: A semiconductor device has a semiconductor die mounted over a surface of a substrate. A mold underfill dispensing needle has a width substantially equal to a width of the semiconductor die. The dispensing needle is placed in fluid communication with a side of the semiconductor die. A mold underfill is deposited from an outlet of the dispensing needle evenly across a width of the semiconductor die into an area between the semiconductor die and substrate without motion of the dispensing needle. The dispensing needle has a shank and the outlet in a T-configuration. The dispensing needle can have a plurality of pole portions between a shank and the outlet. The dispensing needle has a plate between a shank and the outlet. The outlet has an upper edge with a length substantially equal to or greater than a length of a lower edge of the outlet.Type: ApplicationFiled: September 14, 2010Publication date: March 15, 2012Applicant: STATS CHIPPAC, LTD.Inventors: SooMoon Park, ByoungWook Jang, DongSoo Moon
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Patent number: 8115293Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a first substrate; mounting a component over the first substrate; mounting a stack substrate over the component, the stack substrate having an inner pad and an outer pad connected to the first substrate; mounting a first exposed interconnect on the outer pad; forming a first encapsulation over the stack substrate, the first exposed interconnect partially exposed and the inner pad partially exposed in a recess of the first encapsulation; and mounting a second exposed interconnect on the inner pad.Type: GrantFiled: December 8, 2009Date of Patent: February 14, 2012Assignee: Stats Chippac Ltd.Inventors: DongSoo Moon, Taewoo Lee, Soo-San Park, SooMoon Park, Sang-Ho Lee
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Publication number: 20110133325Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a first substrate; mounting a component over the first substrate; mounting a stack substrate over the component, the stack substrate having an inner pad and an outer pad connected to the first substrate; mounting a first exposed interconnect on the outer pad; forming a first encapsulation over the stack substrate, the first exposed interconnect partially exposed and the inner pad partially exposed in a recess of the first encapsulation; and mounting a second exposed interconnect on the inner pad.Type: ApplicationFiled: December 8, 2009Publication date: June 9, 2011Inventors: DongSoo Moon, Taewoo Lee, Soo-San Park, SooMoon Park, Sang-Ho Lee
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Publication number: 20100244212Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a bottom package including a first device over a first substrate and a second substrate over the first device; forming an encapsulation material over the bottom package with an opening over the second substrate; and forming a conductive post within the opening.Type: ApplicationFiled: March 27, 2009Publication date: September 30, 2010Inventors: Jong-Woo Ha, DongSoo Moon, SooMoon Park
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Publication number: 20100237500Abstract: A semiconductor substrate includes a first conductive layer formed over the semiconductor substrate. The first conductive layer has first and second portions which are electrically isolated during formation of the first conductive layer. A solder resist layer is formed over the first conductive layer and semiconductor substrate. An opening is formed in the solder resist layer to expose the first conductive layer. A seed layer is formed over the semiconductor substrate and first conductive layer within the opening. A second conductive layer is formed over the seed layer within the opening. The opening may expose the second portion of the first conductive layer due to solder resist registration shifting causing a defect condition. The second conductive layer electrically contacts the first and second portions of the first conductive layer. By testing the first and second portions of the first conductive layer, the defect condition can be identified.Type: ApplicationFiled: March 20, 2009Publication date: September 23, 2010Applicant: STATS CHIPPAC, LTD.Inventors: ChoongHwan Kwon, SooMoon Park, HeeJo Chi
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Patent number: 7682872Abstract: An integrated circuit package system includes: providing a package carrier; forming a first channel in the package carrier; mounting a first integrated circuit device over the package carrier and adjacent to the first channel; mounting a second integrated circuit device over the package carrier and adjacent to the first channel; and forming a contiguous underfill fillet with the first channel and under both the first integrated circuit device and the second integrated circuit device.Type: GrantFiled: February 25, 2008Date of Patent: March 23, 2010Assignee: Stats Chippac Ltd.Inventors: SooMoon Park, Tae Keun Lee, YoRim Lee
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Publication number: 20100044882Abstract: An integrated circuit package system includes: providing a substrate having a top side with a trace conductor connected to a bottom side with a system interconnect; forming a bump ring on the substrate, the bump ring having an inner cavity area over the trace conductor and an outer bump area; applying a substrate mask layer adjacent a perimeter of the outer bump area; connecting a device to the trace conductor below the bump ring; and applying a compound between the device and the substrate.Type: ApplicationFiled: August 19, 2008Publication date: February 25, 2010Inventors: SooMoon Park, KyungHoon Lee
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Publication number: 20080211111Abstract: An integrated circuit package system includes: providing a package carrier; forming a first channel in the package carrier; mounting a first integrated circuit device over the package carrier and adjacent to the first channel; mounting a second integrated circuit device over the package carrier and adjacent to the first channel; and forming a contiguous underfill fillet with the first channel and under both the first integrated circuit device and the second integrated circuit device.Type: ApplicationFiled: February 25, 2008Publication date: September 4, 2008Inventors: SooMoon Park, Tae Keun Lee, YoRim Lee