Patents by Inventor Soon Cho
Soon Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250066965Abstract: The present invention relates to a polyester nonwoven fabric with suppressed reduction in physical properties by a tufting process, a method for manufacturing same, and a backing fabric for a carpet, comprising same and, in particular, to: a polyester nonwoven fabric in which, by controlling the physical properties of fibers of a first component filament and a second filament, a reduction in physical properties is remarkably suppressed before/after a tufting process, thus enabling the manufacture of a carpet backing fabric with excellent mechanical properties; a method for manufacturing same; and a backing fabric for a carpet, manufactured thereby.Type: ApplicationFiled: December 20, 2022Publication date: February 27, 2025Inventors: Dongheon KANG, Min-ho LEE, Hee-jung CHO, Young-shin PARK, Woo-seok CHOI, Jung-soon JANG
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Publication number: 20250066204Abstract: A carbon dioxide reforming process including: supplying a mixed raw material (feed) including carbon dioxide (CO2), methane (CH4) and hydrogen (H2) to a reactor; and causing the mixed raw material to contact a catalyst inside the reactor, wherein the following Equation 1 is satisfied: 0.05<a/b?0.3.??In Equation 1, a refers to a volume of hydrogen in the mixed raw material, and b refers to a volume of methane in the mixed raw material.Type: ApplicationFiled: September 22, 2023Publication date: February 27, 2025Applicant: LG Chem, Ltd.Inventors: Jun Yeon Cho, Jae Soon Choi, Sangjin Kim, Sojin Kim, Suji Kim, Yongseon kim, Jun Seon Choi, Hyun A Choi
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Patent number: 12225823Abstract: A technology of fabricating a piezoelectric composite applicable to an ultrasonic transducer is disclosed. According to one aspect of the present disclosure, a support member formed with a plurality of through holes is located on one surface of an electrode plate, and lower surfaces of piezoelectric pillars having shapes respectively corresponding to the through holes are adhered onto the one surface of the electrode plate to form the piezoelectric pillars. Further, according to an additional aspect, the plurality of piezoelectric pillars having shapes corresponding to the through holes of the support member are formed by sintering a piezoelectric pellet molded in a pillar shape.Type: GrantFiled: November 18, 2021Date of Patent: February 11, 2025Assignee: NEUROSONA Co., Ltd.Inventors: Nam Kuy Cho, Jin Su Kim, Jung Ho Ko, Man Soon Yoon, Young Min Park
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Patent number: 12225809Abstract: The present disclosure is directed to a coating composition including a graphene oxide and a solvent. At least one of a carboxyl group and an epoxide group of the graphene oxide is functionalized by an amine. The amine has an activation energy to an epoxide group of the graphene oxide of about ?3 kcal/mol to about 8 kcal/mol. A method of forming a stacked structure using the coating composition is provided. A method of manufacturing a display device using the coating composition is provided.Type: GrantFiled: September 23, 2020Date of Patent: February 11, 2025Assignees: SAMSUNG DISPLAY CO., LTD., DONGJIN SEMICHEM CO., LTD.Inventors: Hee Kyun Shin, Dong Kyun Seo, Jun Ho Sim, Woo Jin Cho, Byung Hoon Kang, Seung Jun Moon, Sun Chan Park, Hee Won Seo, Ji Eun Cho, Kyu Soon Shin
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Publication number: 20250039804Abstract: An operation method of an IAB node in a communication system may comprise: measuring a power difference between a first signal received from a first node and a second signal received from a second node; controlling a transmit power of each of the first node and the second node based on the power difference; generating scheduling information for allowing the first node and the second node to simultaneously transmit signals; transmitting the scheduling information to the first node and the second node; and receiving signals that the first node and the second node simultaneously transmit according to the scheduling information by using the transmit power.Type: ApplicationFiled: October 16, 2024Publication date: January 30, 2025Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Jun Hyeong KIM, Seon Ae KIM, IL GYU KIM, Go San NOH, Hee Sang CHUNG, Dae Soon CHO, Sung Woo CHOI, Seung Nam CHOI, Jung Pil CHOI
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Publication number: 20250036009Abstract: Disclosed herein is an actuator for driving zoom lenses, where the zoom actuator comprises a first carrier having attached thereto a first lens and movable along an optical axis; a second carrier having attached thereto a second lens and being capable of moving along the optical axis and running anterior or posterior to the first carrier; a housing enclosing the first and second carriers; a first magnet attached to the first carrier; a second magnet attached to the second carrier; a first coil unit mounted to the housing and facing the first magnet; a second coil unit mounted to the housing and facing the second magnet; and a plurality of balls; with at least one of said plurality of balls positioned between the housing and the first carrier; and at least one of said plurality of balls positioned between the housing and the second carrier.Type: ApplicationFiled: October 15, 2024Publication date: January 30, 2025Inventors: Chul Soon PARK, In Su KANG, Je Seung YEON, Byung Cheol LEE, Hyeon Ik CHO
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Patent number: 12183677Abstract: A three-dimensional (3D) semiconductor device includes a stack structure including first and second stacks stacked on a substrate. Each of the first and second stacks includes a first electrode and a second electrode on the first electrode. A sidewall of the second electrode of the first stack is horizontally spaced apart from a sidewall of the second electrode of the second stack by a first distance. A sidewall of the first electrode is horizontally spaced apart from the sidewall of the second electrode by a second distance in each of the first and second stacks. The second distance is smaller than a half of the first distance.Type: GrantFiled: December 1, 2023Date of Patent: December 31, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Sung-Hun Lee, Seokjung Yun, Chang-Sup Lee, Seong Soon Cho, Jeehoon Han
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Patent number: 12156143Abstract: An operation method of an IAB node in a communication system may comprise: measuring a power difference between a first signal received from a first node and a second signal received from a second node; controlling a transmit power of each of the first node and the second node based on the power difference; generating scheduling information for allowing the first node and the second node to simultaneously transmit signals; transmitting the scheduling information to the first node and the second node; and receiving signals that the first node and the second node simultaneously transmit according to the scheduling information by using the transmit power.Type: GrantFiled: October 22, 2021Date of Patent: November 26, 2024Assignee: Electronics and Telecommunications Research InstituteInventors: Jun Hyeong Kim, Seon Ae Kim, Il Gyu Kim, Go San Noh, Hee Sang Chung, Dae Soon Cho, Sung Woo Choi, Seung Nam Choi, Jung Pil Choi
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Patent number: 12029040Abstract: A semiconductor memory device includes a stack of word lines and insulating patterns. Cell pillars extend vertically through the stack of word lines and insulating patterns with memory cells being formed at the junctions of the cell pillars and the word lines. A ratio of the thickness of the word lines to the thickness of immediately neighboring insulating patterns is different at different locations along one or more of the cell pillars. Related methods of manufacturing and systems are also disclosed.Type: GrantFiled: December 16, 2022Date of Patent: July 2, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Taekyung Kim, Kwang Soo Seol, Seong Soon Cho, Sunghoi Hur, Jintae Kang
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Publication number: 20240155505Abstract: A method of a first user equipment (UE) may comprise: receiving a downlink (DL) reference signal transmitted by a base station using a beam included in a beam candidate group to be used for sidelink (SL) communication with a second UE; measuring a DL reference signal received power (RSRP) of the DL reference signal; determining a transmit power of a beam included in the beam candidate group based on the measured DL RSRP; and transmitting SL data to the second UE with the determined transmit power.Type: ApplicationFiled: October 31, 2023Publication date: May 9, 2024Inventors: Jun Hyeong KIM, Go San NOH, Seon Ae KIM, Il Gyu KIM, Hee Sang CHUNG, Dae Soon CHO, Sung Woo CHOI, Seung Nam CHOI, Jung Pil CHOI
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Patent number: 11979227Abstract: An operation method of a relay node may include: receiving, from a first communication node, first data composed of n bits; receiving, from a second communication node, second data composed of m bits; in response to determining that n is greater than m, generating first T-data of m bits excluding (n-m) bits from the n-bits of the first data and first R-data of (n-m) bits; generating third data by performing a network coding operation on the first T-data and the second data; transmitting the third data to the first communication node; and transmitting the third data and the first R-data to the second communication node.Type: GrantFiled: December 3, 2021Date of Patent: May 7, 2024Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Jun Hyeong Kim, Gyu Il Kim, Go San Noh, Hee Sang Chung, Dae Soon Cho, Sung Woo Choi, Seung Nam Choi, Jung Pil Choi
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Publication number: 20240120354Abstract: A semiconductor package includes a package substrate, a semiconductor chip on the package substrate, a transparent substrate on the semiconductor chip, a dam structure between the semiconductor chip and the transparent substrate, a dummy pad on a lower side of the dam structure and to which no wiring is connected, a planarization film extending along an upper surface of the semiconductor chip and a passivation film on the planarization film, wherein the planarization film is spaced apart from the dam structure.Type: ApplicationFiled: September 21, 2023Publication date: April 11, 2024Applicant: SAMSUNG ELECTRONICS CO, LTD.Inventor: Kyong Soon CHO
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Publication number: 20240105604Abstract: A three-dimensional (3D) semiconductor device includes a stack structure including first and second stacks stacked on a substrate. Each of the first and second stacks includes a first electrode and a second electrode on the first electrode. A sidewall of the second electrode of the first stack is horizontally spaced apart from a sidewall of the second electrode of the second stack by a first distance. A sidewall of the first electrode is horizontally spaced apart from the sidewall of the second electrode by a second distance in each of the first and second stacks. The second distance is smaller than a half of the first distance.Type: ApplicationFiled: December 1, 2023Publication date: March 28, 2024Inventors: Sung-Hun Lee, Seokjung Yun, Chang-Sup Lee, Seong Soon Cho, Jeehoon Han
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Publication number: 20240015631Abstract: Disclosed are a relay method and device in a communication system. An operation method of a first communication node comprises the steps of: transmitting a reference signal to one or more candidate R nodes; receiving first feedback information including a minimum value of a first RSRP from a first candidate R node belonging to the one or more candidate R nodes; receiving second feedback information including a minimum value of a second RSRP from a second candidate R node belonging to the one or more candidate R nodes; comparing a first value based on the first feedback information with a second value based on the second feedback information; when the first value is greater than the second value, selecting the first candidate R node as an R node that is to perform a relaying operation; and communicating with a second communication node via the R node.Type: ApplicationFiled: November 5, 2021Publication date: January 11, 2024Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Jun Hyeong KIM, IL GYU KIM, Go San NOH, Hee Sang CHUNG, Dae Soon CHO, Sung Woo CHOI, Seung Nam CHOI, Jung Pil CHOI
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Patent number: 11854975Abstract: A three-dimensional (3D) semiconductor device includes a stack structure including first and second stacks stacked on a substrate. Each of the first and second stacks includes a first electrode and a second electrode on the first electrode. A sidewall of the second electrode of the first stack is horizontally spaced apart from a sidewall of the second electrode of the second stack by a first distance. A sidewall of the first electrode is horizontally spaced apart from the sidewall of the second electrode by a second distance in each of the first and second stacks. The second distance is smaller than a half of the first distance.Type: GrantFiled: August 27, 2021Date of Patent: December 26, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Sung-Hun Lee, Seokjung Yun, Chang-Sup Lee, Seong Soon Cho, Jeehoon Han
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Publication number: 20230292348Abstract: A method of a transmitting terminal may include: setting an initial beam pairing flag indicating that the transmitting terminal transmitting sidelink-synchronization signal blocks (S-SSBs) is not a synchronization reference terminal; transmitting a plurality of S-SSBs including the initial beam pairing flag in a beam sweeping scheme; receiving, from a receiving terminal, information on a preferred beam among a plurality of beams through which the plurality of S-SSBs are transmitted; and transmitting data to the receiving terminal using the preferred beam.Type: ApplicationFiled: March 6, 2023Publication date: September 14, 2023Inventors: Jun Hyeong KIM, Go San NOH, Seon Ae KIM, Il Gyu KIM, Hee Sang CHUNG, Dae Soon CHO, Sung Woo CHOI, Seung Nam CHOI, Jung Pil CHOI
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Publication number: 20230217384Abstract: An operation method of a first terminal may include: transmitting a plurality of sidelink-synchronization signal blocks (S-SSBs); performing a monitoring operation on a plurality of response resources associated with the plurality of S-SSBs; receiving a first response signal from a second terminal in a first response resource among the plurality of response resources; identifying a first S-SSB associated with the first response resource among the plurality of S-SSBs; and determining a first transmission beam through which the first S-SSB is transmitted among a plurality of transmission beams of the first terminal as an optimal transmission beam.Type: ApplicationFiled: January 3, 2023Publication date: July 6, 2023Inventors: Go San NOH, Jun Hyeong KIM, Seon Ae KIM, Il Gyu KIM, Hee Sang CHUNG, Dae Soon CHO, Sung Woo CHOI, Seung Nam CHOI, Jung Pil CHOI
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Patent number: 11664330Abstract: A semiconductor package includes a first substrate having a first surface and a second surface opposite to the first surface, a first semiconductor chip on the first surface of the first substrate, a second semiconductor chip on the first surface of the first, a stiffener on the first semiconductor chip and the second semiconductor chip, and an encapsulant on the first surface of the first substrate. The first substrate includes a plurality of first pads on the first surface thereof and a plurality of second pads on the second surface thereof. The first semiconductor chip is connected to a first group of first pads of the plurality of first pads. The second semiconductor chip is connected to a second group of first pads of the plurality of first pads. The stiffener covers a space between the first semiconductor chip and the second semiconductor chip. The encapsulant covers at least a sidewall of each of the first and second semiconductor chips and the stiffener.Type: GrantFiled: April 1, 2021Date of Patent: May 30, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventor: Kyong Soon Cho
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Publication number: 20230127052Abstract: A semiconductor memory device includes a stack of word lines and insulating patterns. Cell pillars extend vertically through the stack of word lines and insulating patterns with memory cells being formed at the junctions of the cell pillars and the word lines. A ratio of the thickness of the word lines to the thickness of immediately neighboring insulating patterns is different at different locations along one or more of the cell pillars. Related methods of manufacturing and systems are also disclosed.Type: ApplicationFiled: December 16, 2022Publication date: April 27, 2023Inventors: TAEKYUNG KIM, KWANG SOO SEOL, SEONG SOON CHO, SUNGHOI HUR, JINTAE KANG
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Patent number: 11600608Abstract: A semiconductor package includes a first semiconductor chip on a substrate, a second semiconductor chip on the substrate and spaced apart from the first semiconductor device, a mold layer on the substrate and covering sides of the first and second semiconductor chips, and an image sensor unit on the first and second semiconductor chips and the mold layer. The image sensor unit is electrically connected to the first semiconductor chip.Type: GrantFiled: March 17, 2021Date of Patent: March 7, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Jichul Kim, Chajea Jo, Sang-Uk Han, Kyoung Soon Cho, Jae Choon Kim, Woohyun Park