Patents by Inventor Soon Lock Goh

Soon Lock Goh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11081417
    Abstract: A method of manufacturing a package, comprising embedding the semiconductor chip with an encapsulant comprising a transition metal in a concentration in a range between 10 ppm and 10,000 ppm; selectively converting of a part of the transition metal, such that the electrical conductivity of the encapsulant increases; and plating the converted part of the encapsulant with an electrically conductive material.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: August 3, 2021
    Assignee: Infineon Technologies AG
    Inventors: Sook Woon Chan, Chau Fatt Chiang, Kok Yau Chua, Soon Lock Goh, Swee Kah Lee, Joachim Mahler, Mei Chin Ng, Beng Keh See, Guan Choon Matthew Nelson Tee
  • Publication number: 20200006267
    Abstract: A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads embedded in the mold compound are electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.
    Type: Application
    Filed: September 10, 2019
    Publication date: January 2, 2020
    Inventors: Swee Kah Lee, Hock Heng Chong, Mei Chin Ng, Aileen Manantan Soriano, Fong Mei Lum, Muhammad Muhammat Sanusi, Soon Lock Goh
  • Publication number: 20190341324
    Abstract: A method of manufacturing a package, comprising embedding the semiconductor chip with an encapsulant comprising a transition metal in a concentration in a range between 10 ppm and 10,000 ppm; selectively converting of a part of the transition metal, such that the electrical conductivity of the encapsulant increases; and plating the converted part of the encapsulant with an electrically conductive material.
    Type: Application
    Filed: July 17, 2019
    Publication date: November 7, 2019
    Inventors: Sook Woon CHAN, Chau Fatt CHIANG, Kok Yau CHUA, Soon Lock GOH, Swee Kah LEE, Joachim MAHLER, Mei Chin NG, Beng Keh SEE, Guan Choon Matthew Nelson TEE
  • Patent number: 10431560
    Abstract: A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads embedded in the mold compound are electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.
    Type: Grant
    Filed: October 11, 2017
    Date of Patent: October 1, 2019
    Assignee: Infineon Technologies AG
    Inventors: Swee Kah Lee, Hock Heng Chong, Mei Chin Ng, Aileen Manantan Soriano, Fong Mei Lum, Muhammad Muhammat Sanusi, Soon Lock Goh
  • Patent number: 10396007
    Abstract: A package which comprises a first encapsulant configured so that electrically conductive material is plateable thereon, and a second encapsulant configured so that electrically conductive material is not plateable thereon.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: August 27, 2019
    Assignee: Infineon Technologies AG
    Inventors: Sook Woon Chan, Chau Fatt Chiang, Kok Yau Chua, Soon Lock Goh, Swee Kah Lee, Joachim Mahler, Mei Chin Ng, Beng Keh See, Guan Choon Matthew Nelson Tee
  • Publication number: 20190027430
    Abstract: A semiconductor package and method for fabricating a semiconductor package is disclosed. In one aspect, the method includes providing a substrate, at least partially encapsulating the substrate in an encapsulation body, and depositing by electroplating a first Ni layer on a first surface of the substrate. A second Ni layer by electroless Ni plating is deposited on the first Ni layer.
    Type: Application
    Filed: July 16, 2018
    Publication date: January 24, 2019
    Applicant: Infineon Technologies AG
    Inventor: Soon Lock Goh
  • Publication number: 20180033752
    Abstract: A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads embedded in the mold compound are electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.
    Type: Application
    Filed: October 11, 2017
    Publication date: February 1, 2018
    Inventors: Swee Kah Lee, Hock Heng Chong, Mei Chin Ng, Aileen Manantan Soriano, Fong Mei Lum, Muhammad Muhammat Sanusi, Soon Lock Goh
  • Patent number: 9852918
    Abstract: An electronic device comprising a carrier having a mounting surface, at least one electronic chip mounted on the mounting surface, an encapsulant at least partially encapsulating the carrier and the at least one electronic chip, and a plurality of capsules in the encapsulant, wherein the capsules comprise a core comprising an additive and comprise a shell, in particular a crackable shell, enclosing the core.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: December 26, 2017
    Assignee: Infineon Technologies AG
    Inventors: Peh Hean Teh, Jagen Krishnan, Swee Kah Lee, Poh Cheng Lim, Joachim Mahler, Chew Theng Tai, Yik Yee Tan, Soon Lock Goh
  • Patent number: 9806043
    Abstract: A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads are also embedded in the mold compound and electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.
    Type: Grant
    Filed: March 3, 2016
    Date of Patent: October 31, 2017
    Assignee: Infineon Technologies AG
    Inventors: Swee Kah Lee, Hock Heng Chong, Mei Chin Ng, Aileen Manantan Soriano, Fong Mei Lum, Muhammad Muhammat Sanusi, Soon Lock Goh
  • Publication number: 20170256509
    Abstract: A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads are also embedded in the mold compound and electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.
    Type: Application
    Filed: March 3, 2016
    Publication date: September 7, 2017
    Inventors: Swee Kah Lee, Hock Heng Chong, Mei Chin Ng, Aileen Manantan Soriano, Fong Mei Lum, Muhammad Muhammat Sanusi, Soon Lock Goh
  • Publication number: 20170256472
    Abstract: A package which comprises a first encapsulant configured so that electrically conductive material is plateable thereon, and a second encapsulant configured so that electrically conductive material is not plateable thereon.
    Type: Application
    Filed: March 2, 2017
    Publication date: September 7, 2017
    Inventors: Sook Woon CHAN, Chau Fatt CHIANG, Kok Yau CHUA, Soon Lock GOH, Swee Kah LEE, Joachim MAHLER, Mei Chin NG, Beng Keh SEE, Guan Choon Matthew Nelson TEE
  • Patent number: 9540539
    Abstract: A primer composition is provided. The primer composition includes at least one bi- or multi-functional benzoxazine compound; and at least one compound including a functional group having affinity for a metallic surface, and a cross-linkable group. A method of forming a primer layer on a semiconductor device, and a method of encapsulating a semiconductor device are also provided.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: January 10, 2017
    Assignee: Infineon Technologies AG
    Inventors: Swee Kah Lee, Joachim Mahler, Chew Theng Tai, Yik Yee Tan, Soon Lock Goh, Poh Cheng Lim, Jagen Krishnan, Peh Hean Teh
  • Patent number: 9287238
    Abstract: A semiconductor package includes a plurality of bond pads having a first side and a second side opposing the first side, a coating covering the first side of the bond pads, semiconductor dies and electrical conductors attached to the second side of the bond pads, and a molding compound encasing the semiconductor dies and the electrical conductors at the second side of the bonds pads. The molding compound has a first side through which the bond pads protrude and a second side opposing the first side, the first side of the molding compound having a planar surface between adjacent ones of the bond pads. The package further includes a material plated on exposed sidewalls of the bonds pads uncovered by the molding compound and which is detectable by optical inspection. A corresponding method of manufacture is also provided.
    Type: Grant
    Filed: December 2, 2013
    Date of Patent: March 15, 2016
    Assignee: Infineon Technologies AG
    Inventors: Soon Lock Goh, Swee Kah Lee
  • Publication number: 20160064298
    Abstract: An electronic device comprising a carrier having a mounting surface, at least one electronic chip mounted on the mounting surface, an encapsulant at least partially encapsulating the carrier and the at least one electronic chip, and a plurality of capsules in the encapsulant, wherein the capsules comprise a core comprising an additive and comprise a shell, in particular a crackable shell, enclosing the core.
    Type: Application
    Filed: August 26, 2015
    Publication date: March 3, 2016
    Inventors: Peh Hean TEH, Jagen Krishnan, Swee Kah Lee, Poh Cheng Lim, Joachim Mahler, Chew Theng Tai, Yik Yee Tan, Soon Lock Goh
  • Publication number: 20150344730
    Abstract: A primer composition is provided. The primer composition includes at least one bi- or multi-functional benzoxazine compound; and at least one compound including a functional group having affinity for a metallic surface, and a cross-linkable group. A method of forming a primer layer on a semiconductor device, and a method of encapsulating a semiconductor device are also provided.
    Type: Application
    Filed: May 27, 2014
    Publication date: December 3, 2015
    Applicant: Infineon Technologies AG
    Inventors: Swee Kah LEE, Joachim MAHLER, Chew Theng TAI, Yik Yee TAN, Soon Lock GOH, Poh Cheng LIM, Jagen KRISHNAN, Peh Hean TEH
  • Publication number: 20150155229
    Abstract: A semiconductor package includes a plurality of bond pads having a first side and a second side opposing the first side, a coating covering the first side of the bond pads, semiconductor dies and electrical conductors attached to the second side of the bond pads, and a molding compound encasing the semiconductor dies and the electrical conductors at the second side of the bonds pads. The molding compound has a first side through which the bond pads protrude and a second side opposing the first side, the first side of the molding compound having a planar surface between adjacent ones of the bond pads. The package further includes a material plated on exposed sidewalls of the bonds pads uncovered by the molding compound and which is detectable by optical inspection. A corresponding method of manufacture is also provided.
    Type: Application
    Filed: December 2, 2013
    Publication date: June 4, 2015
    Inventors: Soon Lock Goh, Swee Kah Lee
  • Patent number: 8945990
    Abstract: Embodiments provide a method of forming a chip package. The method may include attaching at least one chip on a carrier, the chip including a plurality of chip pads on a surface of the chip opposite to the carrier; depositing a first adhesion layer on the carrier and on the chip pads of the chip, the first adhesion layer including tin or indium; depositing a second adhesion layer on the first adhesion layer, the second adhesion layer including a silane organic material; and depositing a lamination layer or an encapsulation layer on the second adhesion layer and the chip.
    Type: Grant
    Filed: April 24, 2012
    Date of Patent: February 3, 2015
    Assignee: Infineon Technologies AG
    Inventors: Holger Torwesten, Manfred Mengel, Stefan Schmid, Soon Lock Goh, Swee Kah Lee
  • Publication number: 20130277813
    Abstract: Embodiments provide a method of forming a chip package. The method may include attaching at least one chip on a carrier, the chip including a plurality of chip pads on a surface of the chip opposite to the carrier; depositing a first adhesion layer on the carrier and on the chip pads of the chip, the first adhesion layer including tin or indium; depositing a second adhesion layer on the first adhesion layer, the second adhesion layer including a silane organic material; and depositing a lamination layer or an encapsulation layer on the second adhesion layer and the chip.
    Type: Application
    Filed: April 24, 2012
    Publication date: October 24, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Holger Torwesten, Manfred Mengel, Stefan Schmid, Soon Lock Goh, Swee Kah Lee
  • Patent number: 8304295
    Abstract: Device and method for an electronic device package is disclosed. The electronic device package includes a first pad, a second pad and an encapsulation surrounding the first and second pad, wherein the encapsulation includes a first opening underneath the first pad and a second opening underneath the second pad. A first bump is arranged in the first opening and a second bump is arranged in the second opening, wherein the encapsulation mechanically locks the first bump to the first pad and the second bump to the second pad.
    Type: Grant
    Filed: June 22, 2010
    Date of Patent: November 6, 2012
    Assignee: Infineon Technologies AG
    Inventors: Soon Lock Goh, Swee Kah Lee, Chin Wei Ronnie Tan
  • Publication number: 20110309493
    Abstract: Device and method for an electronic device package is disclosed. The electronic device package includes a first pad, a second pad and an encapsulation surrounding the first and second pad, wherein the encapsulation includes a first opening underneath the first pad and a second opening underneath the second pad. A first bump is arranged in the first opening and a second bump is arranged in the second opening, wherein the encapsulation mechanically locks the first bump to the first pad and the second bump to the second pad.
    Type: Application
    Filed: June 22, 2010
    Publication date: December 22, 2011
    Inventors: Soon Lock Goh, Swee Kah Lee, Chin Wei Ronnie Tan