Patents by Inventor Soon Oh Jung

Soon Oh Jung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10306778
    Abstract: A printed circuit board includes a first substrate including a first insulation layer and a first circuit layer including a bonding pad, the bonding pad disposed on the first insulation layer, a second substrate disposed on the first substrate and having a cavity exposing the bonding pad to an outside, and a dam disposed between the bonding pad and an inner wall of the cavity.
    Type: Grant
    Filed: February 11, 2016
    Date of Patent: May 28, 2019
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jae-Ean Lee, Jee-Soo Mok, Young-Gwan Ko, Soon-Oh Jung, Kyung-Hwan Ko, Yong-Ho Baek
  • Patent number: 9848492
    Abstract: A printed circuit board includes: an insulating layer including a cavity formed therein, the cavity being recessed into the insulating layer from a top surface of the insulating layer; a first circuit layer formed inside the insulating layer such that a portion of the first circuit layer is disposed within the cavity; a second circuit layer disposed above the insulating layer; a first surface-treated layer disposed above the portion of the first circuit layer disposed within the cavity; and a second surface-treated layer disposed above the second circuit layer.
    Type: Grant
    Filed: April 27, 2016
    Date of Patent: December 19, 2017
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jae-Ean Lee, Jee-Soo Mok, Young-Gwan Ko, Soon-Oh Jung, Kyung-Hwan Ko, Yong-Ho Baek
  • Publication number: 20160374196
    Abstract: A printed circuit board includes: a first insulating layer; a first circuit layer disposed above the first insulating layer; a second insulating layer disposed above the first insulating layer; a second circuit layer disposed above the second insulating layer and constructed of a photosensitive material; and a protective layer disposed above the second insulating layer and surrounding the second circuit layer, wherein the protective layer includes a tunnel type cavity and exposes a portion of the second circuit layer to an outside environment, and wherein the second insulating layer exposes a portion of the first circuit layer located below the cavity to an outside environment.
    Type: Application
    Filed: April 20, 2016
    Publication date: December 22, 2016
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jae-Ean LEE, Jee-Soo MOK, Young-Gwan KO, Soon-Oh JUNG, Kyung-Hwan KO, Yong-Ho BAEK
  • Publication number: 20160374197
    Abstract: A printed circuit board includes: an insulating layer including a cavity formed therein, the cavity being recessed into the insulating layer from a top surface of the insulating layer; a first circuit layer formed inside the insulating layer such that a portion of the first circuit layer is disposed within the cavity; a second circuit layer disposed above the insulating layer; a first surface-treated layer disposed above the portion of the first circuit layer disposed within the cavity; and a second surface-treated layer disposed above the second circuit layer.
    Type: Application
    Filed: April 27, 2016
    Publication date: December 22, 2016
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jae-Ean LEE, Jee-Soo MOK, Young-Gwan KO, Soon-Oh JUNG, Kyung-Hwan KO, Yong-Ho BAEK
  • Publication number: 20160242277
    Abstract: A printed circuit board and method of manufacturing the same are provided. The printed circuit board includes a first substrate including a first insulation layer and a first circuit layer including a bonding pad, the bonding pad disposed on the first insulation layer, a second substrate disposed on the first substrate and having a cavity exposing the bonding pad to an outside, and a dam disposed between the bonding pad and an inner wall of the cavity.
    Type: Application
    Filed: February 11, 2016
    Publication date: August 18, 2016
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae-Ean LEE, Jee-Soo MOK, Young-Gwan KO, Soon-Oh JUNG, Kyung-Hwan KO, Yong-Ho BAEK
  • Publication number: 20130243941
    Abstract: A method of manufacturing a coreless substrate having filled via pads, including: forming a first insulating layer on one side of a carrier forming a build-up layer including a build-up insulating layer and a build-up circuit layer having a build-up via on the first insulating layer, and forming a second insulating layer on the build-up layer; removing the carrier, and forming via-holes in the first and second insulating layers; and conducting a filled plating process in the via-holes of the first and second insulating layers thus forming first and second filled via pads therein.
    Type: Application
    Filed: May 7, 2013
    Publication date: September 19, 2013
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seok Kyu LEE, Soon Oh Jung, Jong Kuk Hong, Soon Jin Cho
  • Patent number: 8445790
    Abstract: Disclosed herein is a coreless substrate having filled via pads and a method of manufacturing the same. Insulating layers are formed on both sides of a build-up layer, and via-pads are embedded in the insulating layers such that the via-pads are flush with the insulating layers. The via pads are not separated from a substrate, and thus reliability of the pads is increased. Flatness of bumps is increased, and thus bonding of flip chips becomes easy.
    Type: Grant
    Filed: January 22, 2009
    Date of Patent: May 21, 2013
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Seok Kyu Lee, Soon Oh Jung, Jong Kuk Hong, Soon Jin Cho
  • Publication number: 20120324723
    Abstract: The present invention has been made in an effort to provide a method of manufacturing a coreless substrate that forms an opening by patterning a dry film for forming the opening onto one surface of a carrier, separating the carrier from the substrate, and removing only the dry film for forming the opening. In the present invention, since the pad can be exposed by removing only the dry film for forming the opening, a process time for forming the opening can be reduced and since a process is simple, a cost is saved.
    Type: Application
    Filed: April 17, 2012
    Publication date: December 27, 2012
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Myeong Ho Hong, Byung Moon Kim, Hyun Hee Ku, Soon Oh Jung, Jae Joon Lee
  • Patent number: 7971352
    Abstract: A method of manufacturing a printed circuit board having solder balls. The method may include: stacking a second carrier, in which at least one hole is formed, over one side of a first carrier; forming at least one solder bump by filling the hole with a conductive material; forming a circuit pattern layer, which is electrically connected with the solder bump, on the second carrier; and exposing the solder bump by removing the first carrier and the second carrier. Using this method, uniform hemispherical solder balls with fine pitch can be formed as a part of the manufacturing process, without having to attach the solder balls separately. Carriers may be used to serve as supports during the manufacturing process, whereby deformations can be prevented in the board.
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: July 5, 2011
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Shuhichi Okabe, Jin-Yong An, Seok-Kyu Lee, Soon-Oh Jung, Jong-Kuk Hong, Hae-Nam Seo
  • Publication number: 20110079349
    Abstract: The present invention provides a method of manufacturing a printed circuit board including the steps of: preparing a pair of raw materials, each formed by sequentially stacking a release film and a first insulating layer, and an adhesive layer, respectively; embedding the pair of raw materials, which are opposed to each other, in the adhesive layer while disposing the release films toward an inner layer; forming a second insulating layer, which has a via formed therethrough and a circuit pattern formed on an upper surface to be connected to the via, on the first insulating layer; cutting edge portions of the second and first insulating layers, the release film, and the adhesive layer; and removing the release film from the first insulating layer.
    Type: Application
    Filed: December 17, 2009
    Publication date: April 7, 2011
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Suk Hyeon Cho, Chang Sup Ryu, Jin Yong An, Soon Oh Jung, Sung Won Jeong, Byung Moon Kim, Dong Ju Jeon, Seok Kyu Lee, Jin Ho Kim
  • Publication number: 20110056614
    Abstract: A manufacturing method of a circuit board is disclosed. The manufacturing method of a circuit board in accordance with the present invention includes forming a separation layer on a carrier, stacking an adhesion layer which is coupled to the carrier and covers the separation layer, forming a circuit layer on the adhesion layer, forming a circuit board unit by cutting the separation layer, the adhesion layer and the circuit layer such that the separation layer is separated from the carrier, and forming a stiffener by processing the separation layer of the circuit board unit. The manufacturing method of a circuit board in accordance with the present invention can reduce the cost and time for forming the stiffener by forming the stiffener together in the manufacturing process of the circuit board.
    Type: Application
    Filed: December 30, 2009
    Publication date: March 10, 2011
    Inventors: Jin-Yong AN, Soon-Oh Jung, Dong-Ju Jeon
  • Publication number: 20110048786
    Abstract: Disclosed herein is a printed circuit board having a bump and a method of manufacturing the same. The printed circuit board having a bump includes an insulating layer into which an inner circuit layer is impregnated; a protective layer that is formed under the insulating layer and has an opening exposing a pad unit of the inner circuit layer; and a bump that is integrally formed with the pad unit and is protruded from the inner side of the protective layer to the outside of the protective layer through the opening. The bump is integrally formed with the pad unit, thereby improving bonding strength between the bump and the printed circuit board, and the surface area of the bump is formed to be wide, thereby improving bonding strength between a solder ball and the printed circuit board.
    Type: Application
    Filed: August 27, 2010
    Publication date: March 3, 2011
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Suk Hyeon Cho, Jin Yong Ahn, Soon Oh Jung, Dong Ju Jeon, Ki Hwan Kim, Byung Moon Kim
  • Publication number: 20100291488
    Abstract: A method for manufacturing a cone board including: preparing a core insulation layer including one or more resins selected from the group consisting of epoxy resins and bismaleimide triazine resins; and forming a first nickel layer on at least one surface of the core insulation layer by electroless plating
    Type: Application
    Filed: July 27, 2010
    Publication date: November 18, 2010
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Soon-Oh Jung, Cheol-Ho Choi, Chang-Hyun Nam, Hong-Won Kim, Seung-Chul Kim
  • Patent number: 7707715
    Abstract: Disclosed is a method of fabricating a multilayer printed circuit board, which enables the formation of a micro circuit able to be realized through a semi-additive process using the CTE and rigidity of a metal carrier on a thin substrate which is difficult to convey.
    Type: Grant
    Filed: December 28, 2007
    Date of Patent: May 4, 2010
    Assignee: Samsung Electro-Mechanics, Co., Ltd.
    Inventors: Shuhichi Okabe, Je Gwang Yoo, Chang Sup Ryu, Myung Sam Kang, Jung Hyun Park, Ji Hong Jo, Jin Yong An, Soon Oh Jung
  • Publication number: 20100096177
    Abstract: Disclosed herein is a coreless substrate having filled via pads and a method of manufacturing the same. Insulating layers are formed on both sides of a build-up layer, and via-pads are embedded in the insulating layers such that the via-pads are flush with the insulating layers. The via pads are not separated from a substrate, and thus reliability of the pads is increased. Flatness of bumps is increased, and thus bonding of flip chips becomes easy.
    Type: Application
    Filed: January 22, 2009
    Publication date: April 22, 2010
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seok Kyu Lee, Soon OH Jung, Jong Kuk Hong, Soon Jin Cho
  • Publication number: 20100024212
    Abstract: A method of fabricating a multilayer printed circuit board, which enables the formation of a micro circuit able to be realized through a semi-additive process using the CTE and rigidity of a metal carrier on a thin substrate which is difficult to convey.
    Type: Application
    Filed: October 8, 2009
    Publication date: February 4, 2010
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD
    Inventors: Shuhichi Okabe, Je Gwang Yoo, Chang Sup Ryu, Myung Sam Kang, Jung Hyun Park, Ji Hong Jo, Jin Yong An, Soon Oh Jung
  • Publication number: 20090151160
    Abstract: A method of manufacturing a printed circuit board having solder balls. The method may include: stacking a second carrier, in which at least one hole is formed, over one side of a first carrier; forming at least one solder bump by filling the hole with a conductive material; forming a circuit pattern layer, which is electrically connected with the solder bump, on the second carrier; and exposing the solder bump by removing the first carrier and the second carrier. Using this method, uniform hemispherical solder balls with fine pitch can be formed as a part of the manufacturing process, without having to attach the solder balls separately. Carriers may be used to serve as supports during the manufacturing process, whereby deformations can be prevented in the board.
    Type: Application
    Filed: June 19, 2008
    Publication date: June 18, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Shuhichi Okabe, Jin-Yong An, Seok-Kyu Lee, Soon-Oh Jung, Jong-Kuk Hong, Hae-Nam Seo
  • Publication number: 20090056119
    Abstract: Disclosed is a method of fabricating a multilayer printed circuit board, which enables the formation of a micro circuit able to be realized through a semi-additive process using the CTE and rigidity of a metal carrier on a thin substrate which is difficult to convey.
    Type: Application
    Filed: December 28, 2007
    Publication date: March 5, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Shuhichi Okabe, Je Gwang Yoo, Chang Sup Ryu, Myung Sam Kang, Jung Hyun Park, Ji Hong Jo, Jin Yong An, Soon Oh Jung
  • Publication number: 20090038837
    Abstract: A multilayered printed circuit board is disclosed. A method of manufacturing the multilayered printed circuit board, which includes: forming a metal layer and a lower-circuit-forming pattern in order on a carrier, and forming a lower circuit by filling a conductive material in the lower-circuit-forming pattern; removing the lower-circuit-forming pattern, stacking an insulation resin, and forming at least one via hole connecting with the lower circuit; forming at least one inner circuit and at least one interlayer connector connecting the inner circuit with the lower circuit on the insulation resin, to form a pair of circuit parts; and aligning the pair of circuit parts, attaching the pair of circuit parts to each other, and removing the carrier and the metal layer, allows the forming of fine-lined circuits and provides a thin board, while preventing bending and warpage in the board.
    Type: Application
    Filed: March 27, 2008
    Publication date: February 12, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Shuhichi Okabe, Jin-Yong An, Seok-Kyu Lee, Soon-Oh Jung, Jong-Kuk Hong, Hae-Nam Seo
  • Publication number: 20070201214
    Abstract: The present invention provides a core board and a manufacturing method thereof, in which the core board includes a nickel layer as a seed layer to improve the binding strength between an insulation layer and a conductive layer, so that it allows forming fine inner circuits by the semi-additive method.
    Type: Application
    Filed: February 21, 2007
    Publication date: August 30, 2007
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Soon-Oh Jung, Cheol-Ho Choi, Chang-Hyun Nam, Hong-Won Kim, Seung-Chul Kim