Patents by Inventor Soong Mann SHIN

Soong Mann SHIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11599284
    Abstract: A storage system is provided. The storage system includes a storage device including a plurality of nonvolatile memories configured to transmit storage throughput information, and a host device configured to change connection configurations for the storage device based on the storage throughput information, wherein the host device changes the connection configurations by changing configurations for transmitter and receiver paths between the storage device and the host device independently.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: March 7, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young Min Lee, Soong-Mann Shin, Kyung Phil Yoo
  • Publication number: 20220114117
    Abstract: A storage system is provided. The storage system includes a storage device including a plurality of nonvolatile memories configured to transmit storage throughput information, and a host device configured to change connection configurations for the storage device based on the storage throughput information, wherein the host device changes the connection configurations by changing configurations for transmitter and receiver paths between the storage device and the host device independently.
    Type: Application
    Filed: May 26, 2021
    Publication date: April 14, 2022
    Inventors: Young Min LEE, Soong-Mann SHIN, Kyung Phil YOO
  • Patent number: 9798469
    Abstract: A storage device includes a nonvolatile memory and a memory controller. The nonvolatile memory performs read, write, and erase operations. The memory controller operates in an operating mode where the memory controller exchanges a voltage signal, set to a reference voltage level within an allowable range, with the nonvolatile memory or receives the voltage signal from an external device. When operating in the operating mode, the memory controller optimizes an operating frequency of the nonvolatile memory depending on a voltage level of the voltage signal and a temperature.
    Type: Grant
    Filed: March 19, 2015
    Date of Patent: October 24, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: YoungWook Kim, Kui-Yon Mun, Soong-Mann Shin, Jae-Sung Yu
  • Publication number: 20160034189
    Abstract: A storage device includes a nonvolatile memory and a memory controller. The nonvolatile memory performs read, write, and erase operations. The memory controller operates in an operating mode where the memory controller exchanges a voltage signal, set to a reference voltage level within an allowable range, with the nonvolatile memory or receives the voltage signal from an external device. When operating in the operating mode, the memory controller optimizes an operating frequency of the nonvolatile memory depending on a voltage level of the voltage signal and a temperature.
    Type: Application
    Filed: March 19, 2015
    Publication date: February 4, 2016
    Inventors: YoungWook KIM, Kui-Yon MUN, Soong-Mann SHIN, Jae-Sung YU
  • Patent number: 9037950
    Abstract: A memory controller and an operating method of the memory controller are provided. The operating method includes: performing error correction on data, including a plurality of chunks, in a unit of a chunk; determining if a coefficient of each term of which a degree is equal to or greater than a degree of a reference-degree term, in an error location polynomial for a last chunk among the plurality of chunks, is all zero; and controlling an output time of an error-corrected first chunk based on a result of the determining.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: May 19, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae Phil Kong, Soong Mann Shin, Myung Suk Choi, Sin Ho Yang
  • Publication number: 20130268803
    Abstract: A memory controller and an operating method of the memory controller are provided. The operating method includes: performing error correction on data, including a plurality of chunks, in a unit of a chunk; determining if a coefficient of each term of which a degree is equal to or greater than a degree of a reference-degree term, in an error location polynomial for a last chunk among the plurality of chunks, is all zero; and controlling an output time of an error-corrected first chunk based on a result of the determining.
    Type: Application
    Filed: December 26, 2012
    Publication date: October 10, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae Phil KONG, Soong Mann SHIN, Myung Suk CHOI, Sin Ho YANG