Patents by Inventor Soo-Young Ji
Soo-Young Ji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250147902Abstract: A CXL device according to an example embodiment may include: a memory configured to storing first data; and a control logic configured to calculate a first use ratio of the CXL device, and configured to output second data that are part of first data, stored in the CXL device, to an external share memory through a CXL interface in response to the first use ratio being greater than a reference value.Type: ApplicationFiled: April 15, 2024Publication date: May 8, 2025Applicant: Samsung Electronics Co., Ltd.Inventor: Soo-Young JI
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Patent number: 12277328Abstract: An electronic device includes a host device and a plurality of storage devices. The host device includes a processor and a baseboard management controller (BMC). Each of the plurality of storage devices includes a storage controller and a micro controller unit (MCU). The processor and the storage controller support in-band communication, and the BMC and the MCU support out-of-band communication. The BMC receives monitoring data from the MCU of each of the plurality of storage devices based on the out-of-band communication. The processor allocates a first workload among one or more workloads to a first storage device among the plurality of storage devices, based on a monitoring data set including the monitoring data. The first storage device executes the first workload based on the in-band communication.Type: GrantFiled: October 10, 2023Date of Patent: April 15, 2025Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Seunghan Lee, Heeseok Eun, Kyungkeun Lee, Soo-Young Ji
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Publication number: 20250077104Abstract: Provided is a system and method for migrating data. The method includes: receiving data, read count information about the data, and write count information about the data; selecting at least one memory block among a plurality of memory blocks based on a wear level of a plurality of memory blocks and the read count information and the write count information; and storing the data in the at least one memory block.Type: ApplicationFiled: March 6, 2024Publication date: March 6, 2025Inventors: Hyunjoon YOO, Seo-Hyun Shin, Soo-Young Ji, Seunghan Lee
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Publication number: 20250044942Abstract: A computational storage device includes a control module, and a nonvolatile memory connected to the control module. The nonvolatile memory is configured to store a plurality of graph data elements, which comprises a plurality of nodes and a plurality of edges that connect at least a portion of the plurality of nodes to each other, in a first memory area and a second memory area each having a plurality of blocks and having different read speeds. The control module is configured to store a first graph data element of the plurality of graph data elements having a relatively high degree of association with one node of the plurality of nodes in the first memory area, and store a second graph data element of the plurality of graph data elements having a relatively low degree of association with the one node of the plurality of nodes in the second memory area.Type: ApplicationFiled: October 22, 2024Publication date: February 6, 2025Inventors: SANG-HWA JIN, MIN-HO KIM, DONGOUK MOON, SOO-YOUNG JI
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Publication number: 20250028482Abstract: A storage system includes: a first device connected to a host through an interface including a first and second switches; and a second device connected to the host through the interface. The first device includes: a first controller; a first memory; and a first shared memory including information about a first degradation of the first memory. The second device includes: a second controller; a second memory; and a second shared memory including information about a second degradation of the second memory, the second shared memory being accessible by the first controller through the first switch, and wherein the first controller is configured to: receive a command related to an operation of the first memory from the host, and control the second controller to perform the command, instead of the first controller, based on identifying that the first degradation is higher than the second degradation.Type: ApplicationFiled: April 29, 2024Publication date: January 23, 2025Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Soo-Young Ji, Seo-Hyun Shin, Hyun Joon Yoo, Seung Han Lee
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Patent number: 12206724Abstract: A storage device includes a nonvolatile memory device, and a storage controller configured to control the nonvolatile memory device. The storage controller includes: (i) a quality of experience (QoE) manager configured to schedule a request received from an external user equipment, based on storage device information and network information, and (ii) a software-defined networking (SDN) manager configured to set a network transfer path to the external user equipment, which is associated with video data corresponding to the request.Type: GrantFiled: May 9, 2023Date of Patent: January 21, 2025Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-Hwa Jin, Min-Ho Kim, Dongouk Moon, Soo-Young Ji
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Patent number: 12164785Abstract: The present disclosure provides methods and apparatuses for data loss prevention of a storage device. In some embodiments, the data loss preventing method includes receiving, from a host system, a query plan corresponding to necessary data to be stored in a volatile memory. The data loss preventing method further includes generating, based on the query plan, a data priority list corresponding to the necessary data. The data loss preventing method further includes selecting, based on the data priority list, at least one portion of the volatile memory, when a main power supplied by the host system drops to or below a power level threshold. The data loss preventing method further includes moving the necessary data to the at least one portion of the volatile memory.Type: GrantFiled: May 12, 2023Date of Patent: December 10, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Soo-Young Ji, Younggeon Yoo, Sang-Hwa Jin
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Publication number: 20240387866Abstract: An all solid state battery includes: a battery body including an electrode assembly having first and second surfaces in a first direction, third and fourth surfaces in a second direction, and fifth and sixth surfaces in a third direction, and including a solid electrolyte layer and a cathode and an anode,; a first connection portion; and a second connection portion disposed on the electrode assembly. The first connection portion includes a first current collecting electrode and a first protection portion, the second connection portion includes s a second current collecting electrode and a second protection portion, and the first current collecting electrode is drawn out to one surface of the first connection portion in the third direction and the second current collecting electrode is drawn out to one surface of the second connection portion in the third direction.Type: ApplicationFiled: August 1, 2024Publication date: November 21, 2024Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jung Eun Noh, Soo Young Ji
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Patent number: 12147672Abstract: A computational storage device includes a control module, and a nonvolatile memory connected to the control module. The nonvolatile memory is configured to store a plurality of graph data elements, which comprises a plurality of nodes and a plurality of edges that connect at least a portion of the plurality of nodes to each other, in a first memory area and a second memory area each having a plurality of blocks and having different read speeds. The control module is configured to store a first graph data element of the plurality of graph data elements having a relatively high degree of association with one node of the plurality of nodes in the first memory area, and store a second graph data element of the plurality of graph data elements having a relatively low degree of association with the one node of the plurality of nodes in the second memory area.Type: GrantFiled: May 5, 2023Date of Patent: November 19, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sang-Hwa Jin, Min-Ho Kim, Dongouk Moon, Soo-Young Ji
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Patent number: 12111763Abstract: An apparatus including: a plurality of compute express link (CXL) devices each including a memory and a processor for processing works stored in the memory; and a switch configured to connect the CXL devices to each other, wherein a first CXL device among the plurality of CXL devices selects at least one second CXL device from at least some CXL devices of the plurality of CXL devices to distribute works stored in a memory of the first CXL device based on a usable capacity of a memory of the at least some CXL devices.Type: GrantFiled: December 21, 2022Date of Patent: October 8, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventor: Soo-Young Ji
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Patent number: 12100802Abstract: An all solid state battery includes: a battery body including an electrode assembly having first and second surfaces in a first direction, third and fourth surfaces in a second direction, and fifth and sixth surfaces in a third direction, and including a solid electrolyte layer and a cathode and an anode; a first connection portion; and a second connection portion disposed on the electrode assembly. The first connection portion includes a first current collecting electrode and a first protection portion, the second connection portion includes a second current collecting electrode and a second protection portion, and the first current collecting electrode is drawn out to one surface of the first connection portion in the third direction and the second current collecting electrode is drawn out to one surface of the second connection portion in the third direction.Type: GrantFiled: September 9, 2021Date of Patent: September 24, 2024Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jung Eun Noh, Soo Young Ji
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Publication number: 20240272691Abstract: A computational storage device that is configured to be electrically connected to a host, comprising: a power management integrated circuit that is configured to distribute power; a storage that is configured to store data using a first voltage provided from the power management integrated circuit; a computing module that is configured to perform an operation that is allocated by the host using a second voltage provided from the power management integrated circuit; and a performance monitoring module that is configured to monitor a first workload, a first amount of computation, and/or a first power state of the storage and/or is configured to monitor a second workload, a second amount of computation, and/or a second power state of the computing module and is configured to send a request for additional power to the host based on a monitoring result that is generated by the performance monitoring module.Type: ApplicationFiled: August 18, 2023Publication date: August 15, 2024Inventors: HYUNJOON YOO, SOO-YOUNG JI, HEON JEKAL
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Publication number: 20240256159Abstract: An electronic device includes a host device and a plurality of storage devices. The host device includes a processor and a baseboard management controller (BMC). Each of the plurality of storage devices includes a storage controller and a micro controller unit (MCU). The processor and the storage controller support in-band communication, and the BMC and the MCU support out-of-band communication. The BMC receives monitoring data from the MCU of each of the plurality of storage devices based on the out-of-band communication. The processor allocates a first workload among one or more workloads to a first storage device among the plurality of storage devices, based on a monitoring data set including the monitoring data. The first storage device executes the first workload based on the in-band communication.Type: ApplicationFiled: October 10, 2023Publication date: August 1, 2024Inventors: SEUNGHAN LEE, HEESEOK EUN, KYUNGKEUN LEE, SOO-YOUNG JI
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Publication number: 20240220150Abstract: In a storage system, a first computational storage device may be configured to store first data used to execute a program, and a second computational storage device may be configured to store second data used to execute the program. The second computational storage device may be configured to receive the program offloaded from the host device, bring the first data from the first computational storage device, and execute the program using a plurality of data including the first data and the second data.Type: ApplicationFiled: June 26, 2023Publication date: July 4, 2024Inventors: Heeseok Eun, Seunghan Lee, Jinwook Lee, Soo-Young Ji
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Patent number: 11921625Abstract: A storage device includes a controller configured to receive a pre-processing instruction command from an external device, a non-volatile memory configured to store an original graph data, and a buffer memory connected to the controller and the non-volatile memory, wherein the controller is configured to load the original graph data from the non-volatile memory, generate pre-processing graph data by classifying the original graph data depending on vector similarity in response to the pre-processing instruction command, generate metadata on the basis of the pre-processing graph data, and provide the pre-processing graph data and the metadata to the non-volatile memory, the non-volatile memory is configured to store the pre-processing graph data and the metadata in a data block, and the buffer memory is configured to buffer the original graph data, the pre-processing graph data, and the metadata.Type: GrantFiled: May 24, 2022Date of Patent: March 5, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventor: Soo-Young Ji
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Patent number: 11899941Abstract: A storage device is provided. A storage device includes a non-volatile memory including a plurality of memory segments, and a storage controller connected to the non-volatile memory through a plurality of channels, each of the plurality of channels connected to a respective one of the plurality of memory segments such that each of the plurality of channels has a respective associated memory segment, wherein the storage controller is configured to generate parity according to speed information received from a host with respect to data to be written to the non-volatile memory and store the parity in at least one of the memory segments.Type: GrantFiled: July 27, 2022Date of Patent: February 13, 2024Assignee: Samsung Electronics Co., Ltd.Inventor: Soo-Young Ji
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Publication number: 20240045592Abstract: A computational storage device includes a control module, and a nonvolatile memory connected to the control module. The nonvolatile memory is configured to store a plurality of graph data elements, which comprises a plurality of nodes and a plurality of edges that connect at least a portion of the plurality of nodes to each other, in a first memory area and a second memory area each having a plurality of blocks and having different read speeds. The control module is configured to store a first graph data element of the plurality of graph data elements having a relatively high degree of association with one node of the plurality of nodes in the first memory area, and store a second graph data element of the plurality of graph data elements having a relatively low degree of association with the one node of the plurality of nodes in the second memory area.Type: ApplicationFiled: May 5, 2023Publication date: February 8, 2024Inventors: SANG-HWA JIN, MIN-HO KIM, DONGOUK MOON, SOO-YOUNG JI
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Publication number: 20240004579Abstract: Disclosed are a computational storage device, an electronic system and an electronic device. The computational storage device includes a nonvolatile memory, a buffer memory, and a storage controller. The storage controller communicates with the nonvolatile memory and the buffer memory. The storage controller performs computational processing and data format conversion on first data input to the storage controller based on a storage processing table associated with an external electronic device to output second data.Type: ApplicationFiled: April 14, 2023Publication date: January 4, 2024Applicant: SAMSUNG ELECTRONICS CO., LTDInventors: Soo-Young JI, Min-Ho Kim, Dongouk Moon, Sang-Hwa Jin
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Publication number: 20230421513Abstract: A storage device includes a nonvolatile memory device, and a storage controller configured to control the nonvolatile memory device. The storage controller includes: (i) a quality of experience (QoE) manager configured to schedule a request received from an external user equipment, based on storage device information and network information, and (ii) a software-defined networking (SDN) manager configured to set a network transfer path to the external user equipment, which is associated with video data corresponding to the request.Type: ApplicationFiled: May 9, 2023Publication date: December 28, 2023Inventors: Sang-Hwa Jin, Min-Ho Kim, Dongouk Moon, Soo-Young Ji
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Publication number: 20230409219Abstract: A storage device includes a non-volatile memory including a plurality of namespaces including a plurality of logical blocks; and a storage controller configured to, for each of the plurality of namespaces, check a capacity that is a number of allocable logical blocks, among the plurality of logical blocks, and a size that is a sum of a number of currently allocated logical blocks, among the plurality of logical blocks, and the number of allocable logical blocks, detect a first namespace, among the plurality of namespaces, by using the capacity and the size, and provide at least a portion of the allocable logical blocks of a second namespace, among the plurality of namespaces, to the first namespace.Type: ApplicationFiled: December 14, 2022Publication date: December 21, 2023Inventors: HEESEOK EUN, SOO-YOUNG JI