Patents by Inventor Sopan Joshi

Sopan Joshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7288820
    Abstract: Systems and methods are described for a low-voltage electrostatic discharge clamp. A resistor pwell-tied transistor may be used as a low-voltage ESD clamp, where the body of the transistor is coupled to the source by a resistor, thereby reducing a DC leakage current and minimizing latch-ups in the transistor while maintaining effective ESD performance.
    Type: Grant
    Filed: December 1, 2004
    Date of Patent: October 30, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Michael Baird, Richard T. Ida, James D. Whitfield, Hongzhong Xu, Sopan Joshi
  • Publication number: 20050093073
    Abstract: Systems and methods are described for a low-voltage electrostatic discharge clamp. A resistor pwell-tied transistor may be used as a low-voltage ESD clamp, where the body of the transistor is coupled to the source by a resistor, thereby reducing a DC leakage current and minimizing latch-ups in the transistor while maintaining effective ESD performance.
    Type: Application
    Filed: December 1, 2004
    Publication date: May 5, 2005
    Inventors: Michael Baird, Richard Ida, James Whitfield, Hongzhong Xu, Sopan Joshi
  • Patent number: 6844597
    Abstract: Systems and methods are described for a low-voltage electrostatic discharge clamp. A resistor pwell-tied transistor may be used as a low-voltage ESD clamp, where the body of the transistor is coupled to the source by a resistor, thereby reducing a DC leakage current and minimizing latch-ups in the transistor while maintaining effective ESD performance.
    Type: Grant
    Filed: February 10, 2003
    Date of Patent: January 18, 2005
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Michael Baird, Richard T. Ida, James D. Whitfield, Hongzhong Xu, Sopan Joshi
  • Publication number: 20040155300
    Abstract: Systems and methods are described for a low-voltage electrostatic discharge clamp. A resistor pwell-tied transistor may be used as a low-voltage ESD clamp, where the body of the transistor is coupled to the source by a resistor, thereby reducing a DC leakage current and minimizing latch-ups in the transistor while maintaining effective ESD performance.
    Type: Application
    Filed: February 10, 2003
    Publication date: August 12, 2004
    Inventors: Michael Baird, Richard T. Ida, James D. Whitfield, Hongzhong Xu, Sopan Joshi