Patents by Inventor Sophia Dempwolf

Sophia Dempwolf has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Electrically conductive via(s) in a semiconductor substrate and associated production method
    Patent number: 10825728
    Abstract: A method is provided for producing at least one electrical via in a substrate, the method comprising: producing a protective layer over a component structure which has been produced or is present on a front side of the substrate; forming at least one contact hole which extends from a surface of a backside of the substrate to a contact surface of the component structure; forming a metal-containing and thus conductive lining in the at least one contact hole creating a hollow electrically conductive structure in the at least one contact hole; and applying a passivation layer over the backside of the substrate, the passivation layer spanning over the hollow electrically conductive structure for forming the at least one electrical via. Also provided is a micro-technical component comprising at least one electrical via.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: November 3, 2020
    Assignee: X-FAB Semiconductor Foundries GmbH
    Inventors: Roy Knechtel, Sophia Dempwolf, Daniela Guenther, Uwe Schwarz
  • ELECTRICALLY CONDUCTIVE VIA(S) IN A SEMICONDUCTOR SUBSTRATE AND ASSOCIATED PRODUCTION METHOD
    Publication number: 20190198395
    Abstract: A method is provided for producing at least one electrical via in a substrate, the method comprising: producing a protective layer over a component structure which has been produced or is present on a front side of the substrate; forming at least one contact hole which extends from a surface of a backside of the substrate to a contact surface of the component structure; forming a metal-containing and thus conductive lining in the at least one contact hole creating a hollow electrically conductive structure in the at least one contact hole; and applying a passivation layer over the backside of the substrate, the passivation layer spanning over the hollow electrically conductive structure for forming the at least one electrical via. Also provided is a micro-technical component comprising at least one electrical via.
    Type: Application
    Filed: December 17, 2018
    Publication date: June 27, 2019
    Inventors: Roy Knechtel, Sophia Dempwolf, Daniela Guenther, Uwe Schwarz
  • Electrically conductive via(s) in a semiconductor substrate and associated production method
    Patent number: 10199274
    Abstract: A method is provided for producing at least one electrical via in a substrate, the method comprising: producing a protective layer over a component structure which has been produced or is present on a front side of the substrate; forming at least one contact hole which extends from a surface of a backside of the substrate to a contact surface of the component structure; forming a metal-containing and thus conductive lining in the at least one contact hole creating a hollow electrically conductive structure in the at least one contact hole; and applying a passivation layer over the backside of the substrate, the passivation layer spanning over the hollow electrically conductive structure for forming the at least one electrical via. Also provided is a micro-technical component comprising at least one electrical via.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: February 5, 2019
    Assignee: X-FAB Semiconductor Foundries GmbH
    Inventors: Roy Knechtel, Sophia Dempwolf, Daniela Guenther, Uwe Schwarz
  • ELECTRICAL CONDUCTIVE VIAS IN A SEMICONDUCTOR SUBSTRATE AND A CORRESPONDING MANUFACTURING METHOD
    Publication number: 20170294351
    Abstract: A method is provided for producing at least one electrical via in a substrate, the method comprising: producing a protective layer over a component structure which has been produced or is present on a front side of the substrate; forming at least one contact hole which extends from a surface of a backside of the substrate to a contact surface of the component structure; forming a metal-containing and thus conductive lining in the at least one contact hole creating a hollow electrically conductive structure in the at least one contact hole; and applying a passivation layer over the backside of the substrate, the passivation layer spanning over the hollow electrically conductive structure for forming the at least one electrical via. Also provided is a micro-technical component comprising at least one electrical via.
    Type: Application
    Filed: April 10, 2017
    Publication date: October 12, 2017
    Inventors: Roy Knechtel, Sophia Dempwolf, Daniela Guenther, Uwe Schwarz