Patents by Inventor Sophie Vandebroek

Sophie Vandebroek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5532901
    Abstract: An electrostatic discharge protection device for a connector associated with an integrated circuit chip, particularly one associated with a thermal ink-jet printhead. AMOS field effect device extends along at least one edge of the connector on the chip. A bipolar transistor, parasitic to the field effect device, conducts current from the connector to ground in response to a voltage between the connector and ground in excess of a predetermined threshold. A zone of a predetermined electrical resistance is operatively disposed between the bipolar transistor and ground. The zone may substantially encircle the bonding pad of the connector to evenly distribute local incidences of high voltage. The invention enables integrated circuits to pass ESD requirements of office products, which is 15 kV by Human Body Model testing.
    Type: Grant
    Filed: February 13, 1995
    Date of Patent: July 2, 1996
    Assignee: Xerox Corporation
    Inventors: William G. Hawkins, Cathie J. Burke, Thomas E. Watrobski, Thomas A. Tellier, Sophie Vandebroek
  • Patent number: 5428498
    Abstract: An electrostatic discharge protection device for a connector associated with an integrated circuit chip, particularly one associated with a thermal ink-jet printhead. A MOS field effect device extends along at least one edge of the connector on the chip. A bipolar transistor, parasitic to the field effect device, conducts current from the connector to ground in response to a voltage between the connector and ground in excess of a predetermined threshold. A zone of a predetermined electrical resistance is operatively disposed between the bipolar transistor and ground. The zone may substantially encircle the bonding pad of the connector to evenly distribute local incidences of high voltage. The invention enables integrated circuits to pass ESD requirements of office products, which is 15 kV by Human Body Model testing.
    Type: Grant
    Filed: September 28, 1992
    Date of Patent: June 27, 1995
    Assignee: Xerox Corporation
    Inventors: William G. Hawkins, Cathie J. Burke, Thomas E. Watrobski, Thomas A. Tellier, Sophie Vandebroek