Patents by Inventor Sota Maehara

Sota Maehara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10770552
    Abstract: An epitaxial substrate for semiconductor elements suppresses leakage current and has a high breakdown voltage. The epitaxial substrate for semiconductor elements includes: a semi-insulating free-standing substrate formed of GaN doped with Zn; a buffer layer formed of a group 13 nitride adjacent to the free-standing substrate; a channel layer formed of a group 13 nitride adjacent to the buffer layer; and a barrier layer formed of a group 13 nitride on an opposite side of the buffer layer with the channel layer therebetween, wherein part of a first region consisting of the free-standing substrate and the buffer layer is a second region containing Si at a concentration of 1×1017cm?3 or more, and a minimum value of a concentration of Zn in the second region is 1×1017cm?3.
    Type: Grant
    Filed: January 3, 2020
    Date of Patent: September 8, 2020
    Assignee: NGK INSULATORS, LTD.
    Inventors: Mikiya Ichimura, Sota Maehara, Yoshitaka Kuraoka
  • Publication number: 20200144373
    Abstract: An epitaxial substrate for semiconductor elements suppresses leakage current and has a high breakdown voltage. The epitaxial substrate for semiconductor elements includes: a semi-insulating free-standing substrate formed of GaN doped with Zn; a buffer layer formed of a group 13 nitride adjacent to the free-standing substrate; a channel layer formed of a group 13 nitride adjacent to the buffer layer; and a barrier layer formed of a group 13 nitride on an opposite side of the buffer layer with the channel layer therebetween, wherein part of a first region consisting of the free-standing substrate and the buffer layer is a second region containing Si at a concentration of 1×1017cm?3 or more, and a minimum value of a concentration of Zn in the second region is 1×1017cm?3.
    Type: Application
    Filed: January 3, 2020
    Publication date: May 7, 2020
    Inventors: Mikiya ICHIMURA, Sota MAEHARA, Yoshitaka KURAOKA
  • Patent number: 10629688
    Abstract: An epitaxial substrate for semiconductor elements suppresses leakage current and has a high breakdown voltage. The epitaxial substrate for semiconductor elements includes: a semi-insulating free-standing substrate formed of GaN doped with Zn; a buffer layer formed of a group 13 nitride adjacent to the free-standing substrate; a channel layer formed of a group 13 nitride adjacent to the buffer layer; and a barrier layer formed of a group 13 nitride on an opposite side of the buffer layer with the channel layer therebetween, wherein part of a first region consisting of the free-standing substrate and the buffer layer is a second region containing Si at a concentration of 1×1017 cm?3 or more, and a minimum value of a concentration of Zn in the second region is 1×1017 cm?3.
    Type: Grant
    Filed: April 25, 2018
    Date of Patent: April 21, 2020
    Assignee: NGK INSULATORS, LTD.
    Inventors: Mikiya Ichimura, Sota Maehara, Yoshitaka Kuraoka
  • Patent number: 10580646
    Abstract: An epitaxial substrate for semiconductor elements is provided which suppresses the occurrence of current collapse. The epitaxial substrate for the semiconductor elements includes: a semi-insulating free-standing substrate formed of GaN doped with Zn; a buffer layer adjacent to the free-standing substrate; a channel layer adjacent to the buffer layer; and a barrier layer provided on an opposite side of the buffer layer with the channel layer therebetween, wherein the buffer layer is a diffusion suppressing layer formed of AlpGa1-pN (0.7?p?1) and suppresses diffusion of Zn from the free-standing substrate into the channel layer.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: March 3, 2020
    Assignee: NGK INSULATORS, LTD.
    Inventors: Mikiya Ichimura, Sota Maehara, Yoshitaka Kuraoka
  • Patent number: 10418239
    Abstract: Provided is an epitaxial substrate for semiconductor elements which suppresses an occurrence of current collapse. The epitaxial substrate for the semiconductor elements includes: a semi-insulating free-standing substrate formed of GaN being doped with Zn; a buffer layer being adjacent to the free-standing substrate; a channel layer being adjacent to the buffer layer; and a barrier layer being provided on an opposite side of the buffer layer with the channel layer therebetween, wherein the buffer layer is a diffusion suppressing layer formed of Al-doped GaN and suppresses diffusion of Zn from the free-standing substrate into the channel layer.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: September 17, 2019
    Assignee: NGK INSULATORS, LTD.
    Inventors: Mikiya Ichimura, Sota Maehara, Yoshitaka Kuraoka
  • Patent number: 10410859
    Abstract: An epitaxial substrate for semiconductor elements which suppresses the occurrence of current collapse. The epitaxial substrate for the semiconductor elements includes: a semi-insulating free-standing substrate formed of GaN doped with Zn; a buffer layer adjacent to the free-standing substrate; a channel layer adjacent to the buffer layer; and a barrier layer provided on an opposite side of the buffer layer with the channel layer provided therebetween, wherein the buffer layer is a diffusion suppressing layer that suppresses the diffusion of Zn from the free-standing substrate into the channel layer.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: September 10, 2019
    Assignee: NGK INSULATORS, LTD.
    Inventors: Mikiya Ichimura, Sota Maehara, Yoshitaka Kuraoka
  • Patent number: 10332975
    Abstract: Provided is a group 13 nitride epitaxial substrate with which the HEMT device having superior characteristics can be manufactured. This epitaxial substrate is provided with: a base substrate composed of SiC and having a main surface with a (0001) plane orientation; a nucleation layer formed on one main surface of the base substrate and composed of AlN; an electron transit layer formed on the nucleation layer and composed of a group 13 nitride with the composition AlyGa1-yN (0?y<1); and a barrier layer formed on the electron transit layer and composed of a group 13 nitride with the composition InzAl1-zN (0.13?z?0.23) or AlwGa1-wN (0.15?w?0.35). The (0001) plane of the base substrate has an off angle of 0.1° or more and 0.5° or less, and an intermediate layer composed of a group 13 nitride with the composition AlxGa1-xN (0.01 ?x?0.4) is further provided between the nucleation layer and the electron transit layer.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: June 25, 2019
    Assignee: NGK INSULATORS, LTD.
    Inventors: Mikiya Ichimura, Sota Maehara, Yoshitaka Kuraoka
  • Publication number: 20190027359
    Abstract: Provided is an epitaxial substrate for semiconductor elements which suppresses an occurrence of current collapse. The epitaxial substrate for the semiconductor elements includes: a semi-insulating free-standing substrate formed of GaN being doped with Zn; a buffer layer being adjacent to the free-standing substrate; a channel layer being adjacent to the buffer layer; and a barrier layer being provided on an opposite side of the buffer layer with the channel layer therebetween, wherein the buffer layer is a diffusion suppressing layer that suppresses diffusion of Zn from the free-standing substrate into the channel layer.
    Type: Application
    Filed: April 27, 2018
    Publication date: January 24, 2019
    Inventors: Mikiya ICHIMURA, Sota MAEHARA, Yoshitaka KURAOKA
  • Publication number: 20180294336
    Abstract: Provided is an epitaxial substrate for semiconductor elements which suppresses leakage current and has high breakdown voltage. An epitaxial substrate for semiconductor elements includes: a semi-insulating free-standing substrate formed of GaN being doped with Zn; a buffer layer formed of group 13 nitride to be adjacent to the free-standing substrate; a channel layer formed of group 13 nitride to be adjacent to the buffer layer; and a barrier layer formed of group 13 nitride on an opposite side of the buffer layer with the channel layer therebetween, wherein part of a first region consisting of the free-standing substrate and the buffer layer is a second region containing Si at a concentration of 1×1017 cm?3 or more, and a minimum value of a concentration of Zn in the second region is 1×1017 cm?3.
    Type: Application
    Filed: April 25, 2018
    Publication date: October 11, 2018
    Inventors: Mikiya ICHIMURA, Sota MAEHARA, Yoshitaka KURAOKA
  • Publication number: 20180247809
    Abstract: Provided is an epitaxial substrate for semiconductor elements which suppresses an occurrence of current collapse. The epitaxial substrate for the semiconductor elements includes: a semi-insulating free-standing substrate formed of GaN being doped with Zn; a buffer layer being adjacent to the free-standing substrate; a channel layer being adjacent to the buffer layer; and a barrier layer being provided on an opposite side of the buffer layer with the channel layer therebetween, wherein the buffer layer is a diffusion suppressing layer that suppresses diffusion of Zn from the free-standing substrate into the channel layer.
    Type: Application
    Filed: April 27, 2018
    Publication date: August 30, 2018
    Inventors: Mikiya ICHIMURA, Sota MAEHARA, Yoshitaka KURAOKA
  • Publication number: 20180247817
    Abstract: Provided is an epitaxial substrate for semiconductor elements which suppresses an occurrence of current collapse. The epitaxial substrate for the semiconductor elements includes: a semi-insulating free-standing substrate formed of GaN being doped with Zn; a buffer layer being adjacent to the free-standing substrate; a channel layer being adjacent to the buffer layer; and a barrier layer being provided on an opposite side of the buffer layer with the channel layer therebetween, wherein the buffer layer is a diffusion suppressing layer formed of AlpGa1-pN (0.7?p?1) and suppresses diffusion of Zn from the free-standing substrate into the channel layer.
    Type: Application
    Filed: April 27, 2018
    Publication date: August 30, 2018
    Inventors: Mikiya Ichimura, Sota Maehara, Yoshitaka Kuraoka
  • Publication number: 20180247810
    Abstract: Provided is an epitaxial substrate for semiconductor elements which suppresses an occurrence of current collapse. The epitaxial substrate for the semiconductor elements includes: a semi-insulating free-standing substrate formed of GaN being doped with Zn; a buffer layer being adjacent to the free-standing substrate; a channel layer being adjacent to the buffer layer; and a barrier layer being provided on an opposite side of the buffer layer with the channel layer therebetween, wherein the buffer layer is a diffusion suppressing layer formed of Al-doped GaN and suppresses diffusion of Zn from the free-standing substrate into the channel layer.
    Type: Application
    Filed: April 27, 2018
    Publication date: August 30, 2018
    Inventors: Mikiya ICHIMURA, Sota MAEHARA, Yoshitaka KURAOKA
  • Publication number: 20170200806
    Abstract: Provided is a group 13 nitride epitaxial substrate with which the HEMT device having superior characteristics can be manufactured. This epitaxial substrate is provided with: a base substrate composed of SiC and having a main surface with a (0001) plane orientation; a nucleation layer formed on one main surface of the base substrate and composed of AlN; an electron transit layer formed on the nucleation layer and composed of a group 13 nitride with the composition AlyGa1?yN (0?y<1); and a barrier layer formed on the electron transit layer and composed of a group 13 nitride with the composition InzAl1?zN (0.13?z?0.23) or AlwGa1?wN (0.15?w?0.35). The (0001) plane of the base substrate has an off angle of 0.1° or more and 0.5° or less, and an intermediate layer composed of a group 13 nitride with the composition AlxGa1?xN (0.01?x?0.4) is further provided between the nucleation layer and the electron transit layer.
    Type: Application
    Filed: March 24, 2017
    Publication date: July 13, 2017
    Applicant: NGK INSULATORS, LTD.
    Inventors: Mikiya Ichimura, Sota Maehara, Yoshitaka Kuraoka
  • Patent number: 9478650
    Abstract: Provided is a semiconductor device in which a reverse leakage current is suppressed and the mobility of a two-dimensional electron gas is high. A semiconductor device includes: an epitaxial substrate in which a group of group-III nitride layers are laminated on a base substrate such that a (0001) crystal plane is substantially in parallel with a substrate surface; and a Schottky electrode. The epitaxial substrate includes: a channel layer made of a first group-III nitride having a composition of Inx1Aly1Gaz1N (x1+y1+z1=1, z1>0); a barrier layer made of a second group-III nitride having a composition of Inx2Aly2N (x2+y2=1, x2>0, y2>0); an intermediate layer made of GaN adjacent to the barrier layer; and a cap layer made of AlN and adjacent to the intermediate layer. A Schottky electrode is bonded to the cap layer.
    Type: Grant
    Filed: April 2, 2013
    Date of Patent: October 25, 2016
    Assignee: NGK Insulators, Ltd.
    Inventors: Tomohiko Sugiyama, Sota Maehara, Shigeaki Sumiya, Mitsuhiro Tanaka
  • Patent number: 9196480
    Abstract: Provided is a method for treating a group III nitride substrate capable of obtaining, in the case where a group III nitride layer is laminated thereon, a group III nitride substrate that can form an electronic device having excellent characteristics. The method for treating a group III nitride substrate includes the steps of CMPing a surface of a substrate, elevating a temperature of the group III nitride substrate after the CMP process to a predetermined annealing temperature under a nitrogen gas atmosphere, and holding the group III nitride substrate whose temperature has been elevated to the annealing temperature for four minutes or more and eight minutes or less in a first mixed atmosphere of a hydrogen gas and a nitrogen gas or a second mixed atmosphere of a hydrogen gas and an ammonia gas.
    Type: Grant
    Filed: September 29, 2014
    Date of Patent: November 24, 2015
    Assignee: NGK INSULATORS, LTD.
    Inventors: Yoshitaka Kuraoka, Tomohiko Sugiyama, Sota Maehara
  • Patent number: 8969880
    Abstract: Provided is a crack-free epitaxial substrate having a small amount of warping, in which a silicon substrate is used as a base substrate. The epitaxial substrate includes: a (111) single crystal Si substrate and a buffer layer formed of a plurality of lamination units being continuously laminated. The lamination unit includes: a composition modulation layer formed of a first and a second unit layer having different compositions being alternately and repeatedly laminated such that a compressive strain exists therein; a termination layer formed on an uppermost portion of the composition modulation layer, the termination layer acting to maintain the compressive strain existing in the composition modulation layer; and a strain reinforcing layer formed on the termination layer, the strain reinforcing layer acting to enhance the compressive strain existing in the composition modulation layer.
    Type: Grant
    Filed: December 5, 2012
    Date of Patent: March 3, 2015
    Assignee: NGK Insulators, Ltd.
    Inventors: Makoto Miyoshi, Shigeaki Sumiya, Mikiya Ichimura, Sota Maehara, Mitsuhiro Tanaka
  • Patent number: 8946723
    Abstract: Provided is a crack-free epitaxial substrate having excellent breakdown voltage properties in which a silicon substrate is used as a base. The epitaxial substrate includes a (111) single crystal Si substrate and a buffer layer including a plurality of first lamination units. Each of those units includes a composition modulation layer formed of a first composition layer made of AlN and a second composition layer made of AlxGa1-xN being alternately laminated, and a first intermediate layer made of AlyGa1-yN (0?y<1). The relationship of x(1)?x(2)? . . . ?x(n?1)?x(n) and x(1)>x(n) is satisfied, where n represents the number of laminations of each of the first and second composition layers, and x(i) represents the value of x in i-th one of the second composition layers as counted from the base substrate side. The second composition layer is coherent to the first composition layer, and the first intermediate layer is coherent to the composition modulation layer.
    Type: Grant
    Filed: October 23, 2012
    Date of Patent: February 3, 2015
    Assignee: NGK Insulators, Ltd.
    Inventors: Makoto Miyoshi, Shigeaki Sumiya, Mikiya Ichimura, Sota Maehara, Mitsuhiro Tanaka
  • Publication number: 20150017786
    Abstract: Provided is a method for treating a group III nitride substrate capable of obtaining, in the case where a group III nitride layer is laminated thereon, a group III nitride substrate that can form an electronic device having excellent characteristics. The method for treating a group III nitride substrate includes the steps of CMPing a surface of a substrate, elevating a temperature of the group III nitride substrate after the CMP process to a predetermined annealing temperature under a nitrogen gas atmosphere, and holding the group III nitride substrate whose temperature has been elevated to the annealing temperature for four minutes or more and eight minutes or less in a first mixed atmosphere of a hydrogen gas and a nitrogen gas or a second mixed atmosphere of a hydrogen gas and an ammonia gas.
    Type: Application
    Filed: September 29, 2014
    Publication date: January 15, 2015
    Applicant: NGK INSULATORS, LTD.
    Inventors: Yoshitaka Kuraoka, Tomohiko Sugiyama, Sota Maehara
  • Publication number: 20140361337
    Abstract: Provided is a lattice-matched HEMT device, which is a HEMT device having high reverse breakdown voltage while securing two-dimensional electron gas concentration in a practical range. In producing a semiconductor device by forming a channel layer made of GaN on a base substrate such as an AlN template substrate or a substrate that includes a Si single crystal base material as a base, forming a barrier layer made of a group-III nitride having a composition of InxAlyGazN (x+y+z=1, 0?z?0.3) on the channel layer, and forming a source electrode, a drain electrode, and a gate electrode on the barrier layer, an In mole fraction x, a Ga mole fraction z, and a thickness d of the barrier layer satisfy a predetermined range.
    Type: Application
    Filed: August 22, 2014
    Publication date: December 11, 2014
    Applicant: NGK INSULATORS, LTD.
    Inventors: Tomohiko Sugiyama, Shigeaki Sumiya, Sota Maehara, Mitsuhiro Tanaka
  • Patent number: 8853829
    Abstract: Provided is a crack-free epitaxial substrate having a small amount of dislocations in which a silicon substrate is used as a base substrate. An epitaxial substrate includes a substrate made of (111) single crystal silicon and a base layer group in which a plurality of base layers are laminated. Each of the plurality of base layers includes a first group-III nitride layer made of AlN and a second group-III nitride layer made of AlyyGazzN formed on the first group-III nitride layer. The first group-III nitride layer has many crystal defects. An interface between the first and second group-III nitride layers is a three-dimensional concavo-convex surface. In the base layer other than the base layer formed immediately above the base substrate, the first group-III nitride layer has a thickness of 50 nm or more and 100 nm or less and the second group-III nitride layer satisfies 0?yy?0.2.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: October 7, 2014
    Assignee: NGK Insulators, Ltd
    Inventors: Makoto Miyoshi, Mikiya Ichimura, Sota Maehara, Mitsuhiro Tanaka