Abstract: In a solid-state image pickup device according to this invention, because a photodiode 2 has a side close to a transfer transistor 3 is longer than an opposite side of the photodiode 2, the transfer transistor 3 can be increased in width. Therefore, it is possible to miniaturize the size of a pixel without causing deterioration in reading property. As a result, this invention can provide the solid-state image pickup device that achieves further miniaturization of pixels by applying an efficient layout of the pixels.

Abstract: A solid state imaging device includes shared amplification transistors and reset transistors arranged, for example, in a checkered pattern so that centroid of photo diodes 2 of the same colors are arranged substantially at an identical pitch. As a result, the resolution of the solid state imaging device can be maintained without considering irregularities of the incident light for each unit pixel.

Abstract: In a solid-state image pickup device according to this invention, because a photodiode 2 has a side close to a transfer transistor 3 is longer than an opposite side of the photodiode 2, the transfer transistor 3 can be increased in width. Therefore, it is possible to miniaturize the size of a pixel without causing deterioration in reading property. As a result, this invention can provide the solid-state image pickup device that achieves further miniaturization of pixels by applying an efficient layout of the pixels.

Abstract: A method for fabricating a solid-state imaging device comprises: a step of forming a photodiode protection insulation film 6a; a step of forming a dummy protection insulation film 6c corresponding to the photodiode protection insulation film 6a both in the peripheral circuit region 1b and the scribe lane region 1c; and a step of forming an interlayer insulation film 9 for covering all three regions of a pixel region 1a in which pixels and the photodiode protection insulation film 6a are formed, a peripheral circuit region 1b in which a driving circuit and the dummy protection insulation film 6c are formed, and a scribe lane region 1c in which the dummy protection insulation film 6c is formed, wherein the dummy protection insulation film 6c causes an average height of a surface of the interlayer insulation film 9 included in each of the peripheral circuit region 1b and the scribe lane region 1c to be close to an average height of a surface of the interlayer insulation film 9 included in the pixel region 1a, be

Abstract: A solid state imaging device includes shared amplification transistors and reset transistors arranged, for example, in a checkered pattern so that centroid of photo diodes 2 of the same colors are arranged substantially at an identical pitch. As a result, the resolution of the solid state imaging device can be maintained without considering irregularities of the incident light for each unit pixel.

Abstract: There provided are a layout configuration in which fluctuation in pixel sensitivity characteristics is reduced and a solid-state image pickup device which attains high yield and high sensitivity. Respective sections included in pixels 2a and 2b, such as light receiving regions 20a and 20b of PDs 3a and 3b, transfer gate electrodes 4a and 4b, and FD 5, have outer shapes comprising lines extending in row directions and lines extending in column directions. The light receiving regions 20a and 20b, the transfer gate electrodes 4a and 4b, and FD 5 which the pixel pair includes are disposed in an axisymmetrical manner with respect to a straight line extending between the 2 pixels of the pixel pair. And FD 5 and source regions and drain regions of a reset transistor 6 and an amplifier transistor 12 are disposed in a straight line extending in a column direction.

Abstract: A semiconductor device includes a semiconductor substrate, an isolation film that is provided in one principal surface of the semiconductor substrate, wiring that is arranged on the isolation film, a diffusion layer that is formed inside the semiconductor substrate and located in the vicinity of the isolation film, and an insulating film that covers the diffusion layer over the one principal surface of the semiconductor substrate. The insulating film further covers a portion of the isolation film near to the diffusion layer and comes into contact with the side of the wiring near to the diffusion layer.

Abstract: A thickness of each of side walls (105) in a transistor TrA is made thinner than a thickness of each of side walls (105) in a transistor TrB. In the transistor TrA, a surface of a high concentration impurity diffusion layer (106) and a bottom portion of the side wall (105) are at overlapping positions when viewed from a principal surface direction of a substrate. A silicide layer (108) is formed only in the high concentration impurity diffusion layer (106). Such limited formation can be realized by forming the high concentration impurity diffusion layer (106) in the transistor TrA after forming a CVD oxide film (111) covering the transistor TrB and prior to forming the silicide layer (108). In such a manner, off-leak characteristics can be improved by a simple structure, and the silicide transistor and the non-silicide transistor can be concurrently formed on the same one substrate.

Abstract: A method for fabricating a solid-state imaging device comprises: a step of forming a photodiode protection insulation film 6a; a step of forming a dummy protection insulation film 6c corresponding to the photodiode protection insulation film 6a both in the peripheral circuit region 1b and the scribe lane region 1c; and a step of forming an interlayer insulation film 9 for covering all three regions of a pixel region 1a in which pixels and the photodiode protection insulation film 6a are formed, a peripheral circuit region 1b in which a driving circuit and the dummy protection insulation film 6c are formed, and a scribe lane region 1c in which the dummy protection insulation film 6c is formed, wherein the dummy protection insulation film 6c causes an average height of a surface of the interlayer insulation film 9 included in each of the peripheral circuit region 1b and the scribe lane region 1c to be close to an average height of a surface of the interlayer insulation film 9 included in the pixel region 1a, be

Abstract: A 3Tr-operated CMOS solid-state imaging apparatus comprises a plurality of pixels including adjacent first and second pixels 230 and 231 including photodiodes 201 for converting light into signal charges and transfer transistors for reading out the signal charges accumulated in the photodiodes, respectively. The first pixel 230 further includes a reset transistor connected at one end to the photodiodes 201 of the first and second pixels 230 and 231 and supplied at the other end with a power voltage, and the second pixel 231 further includes an amplifier transistor having a gate electrode 204 connected to the transfer transistors of the first and second pixel 230 and 231 and supplied at its drain with a power voltage.

Abstract: Provided is a solid-state image pickup device which comprises well contacts and well wirings for supplying a reference voltage to a well and can suppress a reduction in an amount of light received even when a pixel area is decreased. As a well wiring, used is a well main-wiring 4 which is formed in a same process as that in which gates of respective transistors are formed, using a same material as that of the gates of respective transistors. In a pixel region (PXR), the well wiring and the well contact comprises the well main-wiring 4, a well sub-wiring 6 in a first wiring layer 10 immediately above the well main-wiring 4, contacts 3 and 5 provided in a gate electrode layer 9. The well wiring and the well contact are not formed in wiring layers above a second wiring layer 11.

Abstract: There provided are a layout configuration in which fluctuation in pixel sensitivity characteristics is reduced and a solid-state image pickup device which attains high yield and high sensitivity. Respective sections included in pixels 2a and 2b, such as light receiving regions 20a and 20b of PDs 3a and 3ba, transfer gate electrodes 4a and 4ba, and FD 5, have outer shapes comprising lines extending in row directions and lines extending in column directions. The light receiving regions 20a and 20b, the transfer gate electrodes 4a and 4ba, and FD 5 which the pixel pair includes are disposed in an axisymmetrical manner with respect to a straight line extending between the 2 pixels of the pixel pair. And FD 5 and source regions and drain regions of a reset transistor 6 and an amplifier transistor 12 are disposed in a straight line extending in a column direction.

Abstract: A solid-state imaging device that achieves a reduction in variations appearing on a reproducing screen is provided. The solid-state imaging device includes a plurality of pixel cells that are laid out in matrix form on a semiconductor substrate and a driving unit that is provided to drive the plurality of pixel cells. Each of the plurality of pixel cells includes a photodiode, a MOS transistor, and an element isolating portion 2 that is formed so that the photodiode and the MOS transistor are isolated from each other. The element isolating portion 2 is formed of a STI (Shallow Trench Isolation) that is a grooved portion of the semiconductor substrate. In the semiconductor substrate 7, a STI leakage stopper 1 in which an impurity of a conductive type opposite to a conductive type of source/drain regions in the MOS transistor is introduced is formed to enclose side walls and a bottom face of the element isolating portion 2.

Abstract: A semiconductor device includes a semiconductor substrate, an isolation film that is provided in one principal surface of the semiconductor substrate, wiring that is arranged on the isolation film, a diffusion layer that is formed inside the semiconductor substrate and located in the vicinity of the isolation film, and an insulating film that covers the diffusion layer over the one principal surface of the semiconductor substrate. The insulating film further covers a portion of the isolation film near to the diffusion layer and comes into contact with the side of the wiring near to the diffusion layer.

Abstract: A solid-state imaging device that achieves a reduction in variations appearing on a reproducing screen is provided. The solid-state imaging device includes a plurality of pixel cells that are laid out in matrix form on a semiconductor substrate and a driving unit that is provided to drive the plurality of pixel cells. Each of the plurality of pixel cells includes a photodiode, a MOS transistor, and an element isolating portion 2 that is formed so that the photodiode and the MOS transistor are isolated from each other. The element isolating portion 2 is formed of a STI (Shallow Trench Isolation) that is a grooved portion of the semiconductor substrate. In the semiconductor substrate 7, a STI leakage stopper 1 in which an impurity of a conductive type opposite to a conductive type of source/drain regions in the MOS transistor is introduced is formed to enclose side walls and a bottom face of the element isolating portion 2.