Patents by Inventor Soung-Min Ku

Soung-Min Ku has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8492833
    Abstract: A semiconductor device includes a semiconductor substrate including a cell area and a peripheral circuit area, a first trench for device isolation formed in the cell area of the semiconductor substrate and a second trench for device isolation formed within the semiconductor substrate of the peripheral circuit area to be deeper than the first trench, a device isolation layer buried within the first and second trenches for device isolation and having the same surface level as the semiconductor substrate in the cell area, a buried gate buried in the semiconductor substrate of the cell area, and a peripheral circuit gate which is in contact with the semiconductor substrate of the peripheral circuit area, is buried within the device isolation layer of the peripheral circuit area, and has the same surface level as the buried gate.
    Type: Grant
    Filed: July 6, 2011
    Date of Patent: July 23, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventor: Soung Min Ku
  • Publication number: 20120007177
    Abstract: A semiconductor device includes a semiconductor substrate including a cell area and a peripheral circuit area, a first trench for device isolation formed in the cell area of the semiconductor substrate and a second trench for device isolation formed within the semiconductor substrate of the peripheral circuit area to be deeper than the first trench, a device isolation layer buried within the first and second trenches for device isolation and having the same surface level as the semiconductor substrate in the cell area, a buried gate buried in the semiconductor substrate of the cell area, and a peripheral circuit gate which is in contact with the semiconductor substrate of the peripheral circuit area, is buried within the device isolation layer of the peripheral circuit area, and has the same surface level as the buried gate.
    Type: Application
    Filed: July 6, 2011
    Publication date: January 12, 2012
    Applicant: Hynix Semiconductor Inc.
    Inventor: Soung Min KU
  • Patent number: 7951682
    Abstract: A method for fabricating a capacitor in a semiconductor device includes forming an insulation layer over a substrate, forming a storage node contact plug passing through the insulation layer and coupled to the substrate, recessing the storage node contact plug to a certain depth to obtain a sloped profile, forming a barrier metal over the surface profile of the recessed storage node contact plug, forming a sacrificial layer over the substrate structure, etching the sacrificial layer to form an opening exposing the barrier metal, forming a bottom electrode over the surface profile of the opening, and removing the etched sacrificial layer.
    Type: Grant
    Filed: May 4, 2009
    Date of Patent: May 31, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Soung-Min Ku
  • Publication number: 20100055861
    Abstract: A method for fabricating a capacitor in a semiconductor device includes forming an insulation layer over a substrate, forming a storage node contact plug passing through the insulation layer and coupled to the substrate, recessing the storage node contact plug to a certain depth to obtain a sloped profile, forming a barrier metal over the surface profile of the recessed storage node contact plug, forming a sacrificial layer over the substrate structure, etching the sacrificial layer to form an opening exposing the barrier metal, forming a bottom electrode over the surface profile of the opening, and removing the etched sacrificial layer.
    Type: Application
    Filed: May 4, 2009
    Publication date: March 4, 2010
    Inventor: Soung-Min Ku