Patents by Inventor Sourabh Swarnkar

Sourabh Swarnkar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10979034
    Abstract: A circuit includes a master latch circuit and a slave latch circuit. The master latch circuit is configured to receive an input data signal associated with an input data voltage domain and generate a first output data signal associated with an output data voltage domain different from the input data voltage domain. The slave latch circuit is configured to receive, from the master latch circuit, the first output data signal and generate a second output data associated with the output data voltage domain.
    Type: Grant
    Filed: June 19, 2018
    Date of Patent: April 13, 2021
    Assignee: XILINX, INC.
    Inventors: Kumar Rahul, Santosh Yachareni, Jitendra Kumar Yadav, Md Nadeem Iqbal, Teja Masina, Sourabh Swarnkar, Suresh Babu Kotha