Abstract: A data processing apparatus comprises a plurality of processor circuits to process an event stream comprising one or more high energy events. Each of the plurality of processor circuits draws power from a same power rail. Power management circuitry performs power consumption management by controlling a voltage supply to the power rail, and a frequency of a clock signal provided to the plurality of processor circuits. Status analysis circuitry obtains a status of the individual processing load of each of the processor circuits and restriction circuitry performs high energy event restriction on each of the plurality of processor circuits. The power consumption management and the high energy event restriction are both based on the individual processing load of each of the plurality of processor circuits and each of the processor circuits is restrictable by the restriction circuitry independently of others of the processor circuits.

Abstract: A data processing apparatus comprises a plurality of processor circuits to process an event stream comprising one or more high energy events. Each of the plurality of processor circuits draws power from a same power rail. Power management circuitry performs power consumption management by controlling a voltage supply to the power rail, and a frequency of a clock signal provided to the plurality of processor circuits. Status analysis circuitry obtains a status of the individual processing load of each of the processor circuits and restriction circuitry performs high energy event restriction on each of the plurality of processor circuits. The power consumption management and the high energy event restriction are both based on the individual processing load of each of the plurality of processor circuits and each of the processor circuits is restrictable by the restriction circuitry independently of others of the processor circuits.