Patents by Inventor Soyeb Nagori

Soyeb Nagori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12088811
    Abstract: Several methods and systems for encoding pictures associated with video data are disclosed. In an embodiment, a method includes determining by a processing module, whether a picture is to be encoded based on at least one of a skip assessment associated with the picture and an encoding status of a pre-selected number of pictures preceding the picture in an encoding sequence. The method further includes encoding by the processing module, a plurality of rows of video data associated with the picture upon determining that the picture is to be encoded, wherein the plurality of rows are encoded based on a pre-selected maximum encoded picture size.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: September 10, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Naveen Srinivasamurthy, Soyeb Nagori, Manoj Koul
  • Patent number: 12047566
    Abstract: A method and system for bit rate control during encoding of multimedia data are disclosed. A change in complexity of a multimedia picture relative to complexity associated with one or more multimedia pictures in a multimedia sequence is determined. A complexity associated with a multimedia picture is determined based on number of bits and an average quantization associated with the multimedia picture. A bit rate is adjusted for encoding the multimedia picture based on the change in complexity of the multimedia picture. The bit rate is increased on determining an increase in complexity of the multimedia picture and is decreased on determining a decrease in complexity of the multimedia picture. Utilization of additional bits during the increase in the bit rate and saving of bits during the decrease in the bit rate are compensated during adjusting of bit rates for encoding subsequent multimedia pictures in the multimedia sequence.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: July 23, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Naveen Srinivasamurthy, Mahant Siddaramanna, Soyeb Nagori
  • Patent number: 12047590
    Abstract: A video encoder receives a minimum number of bits (MIN) and a maximum number of bits (MAX) to be used to encode a segment of a sequence of image frames, the segment including a set of pictures contained in the sequence of image frames. The video encoder encodes the set of pictures using a total number of bits greater than the minimum number of bits (MIN), and not exceeding the maximum number of bits (MAX). Thus, the transmission bit-rate of the video encoder can be constrained to lie within a maximum and minimum rate. In an embodiment, the constraints are enforced over relatively short time intervals.
    Type: Grant
    Filed: August 22, 2022
    Date of Patent: July 23, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Soyeb Nagori, Naveen Srinivasamurthy, Anurag Jain
  • Patent number: 11997287
    Abstract: Several methods and systems for encoding of multimedia pictures are disclosed. In an embodiment, an occupancy level of a coded picture buffer (CPB) associated with a hypothetical reference decoder (HRD) is estimated at an instant of removal of an access unit corresponding to a multimedia picture from the CPB for decoding the access unit. A number of bits for encoding the multimedia picture is allocated based on the estimated occupancy level of the CPB. The multimedia picture is encoded based on the allocated number of bits.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: May 28, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Arun Shankar Kudana, Uday Pudipeddi Kiran, Anurag Mithalal Jain, Soyeb Nagori
  • Publication number: 20240153139
    Abstract: Disclosed herein are systems and methods that provide an end-to-end approach for performing multi-dimensional object pose estimation in the context of machine learning models. In an implementation, processing circuitry of a suitable computer inputs image data to a machine learning model that predicts a parameterized rotation vector and a parameterized translation vector for an object in the image. Next, the processing circuitry converts the parameterized rotation vector and the parameterized translation vector into a non-parameterized rotation vector and a non-parameterized translation vector respectively. Finally, the processing circuitry updates the image data based on the non-parameterized rotation vector and the non-parameterized translation vector.
    Type: Application
    Filed: July 20, 2023
    Publication date: May 9, 2024
    Inventors: Debapriya Maji, Soyeb Nagori, Deepak Poddar, Manu Mathew
  • Patent number: 11936857
    Abstract: According to an aspect, a video encoder selects a block of intermediate size from a set of block sizes for intra-prediction estimation for encoding a video signal. A set of neighboring blocks with the intermediate size are tested for combining. If the set of neighboring blocks are determined to be combinable, the video encoder selects a larger block size formed by the tested neighboring blocks for encoding. On the other hand, if the set of neighboring blocks are determined to be not combinable, the video encoder selects a smaller block size from the set of tested neighboring blocks for prediction. According to another aspect of the present disclosure, the best mode for intra-prediction is determined by first intra-predicting a block with intermediate modes in a set of modes. Then the intra-predictions are performed for the neighboring modes of at least one intermediate mode.
    Type: Grant
    Filed: March 20, 2023
    Date of Patent: March 19, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Mahant Siddaramanna, Naveen Srinivasamurthy, Soyeb Nagori
  • Patent number: 11930194
    Abstract: Systems, methods and computer readable mediums are presented for encoding a stream of input video frames, in which the input video frames are down sampled and the down sampled frames are encoded in a first encoding pass to generate a set of first pass coded frames forming a single first pass I frame and a plurality of first pass P frames formed into first pass sub-groups of pictures (SUB-GOPs). First pass encoding statistics are generated for individual first pass SUB-GOPs, and the statistics are used to encode the input video frames in a second encoding pass to generate a set of second pass coded frames.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 12, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Arun Shankar Kudana, Soyeb Nagori
  • Publication number: 20240078284
    Abstract: A hardware accelerator is configured to perform matrix multiplication and/or additional operations to optimize keypoint matching. A sum of squared error (SSE) calculation may be determined by utilizing the hardware accelerator to perform matrix multiplication to obtain a cost matrix for two sets of keypoint descriptors from two images. The hardware accelerator may determine a best cost calculation for each keypoint in each direction, which is utilized to perform keypoint matching.
    Type: Application
    Filed: November 1, 2023
    Publication date: March 7, 2024
    Inventors: Deepak Kumar PODDAR, Soyeb NAGORI, Hrushikesh Tukaram GARUD, Pramod Kumar SWAMI
  • Publication number: 20240046413
    Abstract: Technology is disclosed herein to execute an inference model by a processor which includes a reshape layer. In an implementation, the reshape layer of the inference model receives an output produced by a previous layer of the inference model and inserts padding into the output, then supplies the padded output as an input to a next layer of the inference model. In an implementation, the inference model includes a stitching layer at the beginning of the inference model and an un-stitch layer at the end of the model. The stitching layer of the inference model stitches together multiple input images into an image batch and supplies the image batch as an input to a subsequent layer. The un-stitch layer receives output from a penultimate layer of the inference model and unstitches the output to produce multiple output images corresponding to the multiple input images.
    Type: Application
    Filed: February 27, 2023
    Publication date: February 8, 2024
    Inventors: Pramod Swami, Anshu Jain, Eppa Praveen Reddy, Kumar Desappan, Soyeb Nagori, Arthur Redfern
  • Patent number: 11887346
    Abstract: An example image feature extraction system comprises an encoder neural network having a first set of layers and a decoder neural network having a second set of layers and a third set of layers. The encoder neural network receives an input image, processes the input image through the first set of layers, and computes an encoded feature map based on the input image. The decoder neural network receives the encoded feature map, processes the encoded feature map through the second set of layers to compute a keypoint score map, and processes the encoded feature map through at least a portion of the third set of layers to compute a feature description map.
    Type: Grant
    Filed: March 1, 2023
    Date of Patent: January 30, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Deepak Kumar Poddar, Soyeb Nagori, Hrushikesh Tukaram Garud, Kumar Desappan
  • Patent number: 11889101
    Abstract: A method comprises dividing a largest coding unit (LCU) of a picture into a plurality of motion estimation regions (MERs) having size equal to or less than a predetermined size. For one or more MERs of the plurality of MERs, a number of first motion searches are performed for determining a first quad-tree based on a cost function associated with a first plurality of prediction units (PUs) of the one or more MERs. A number of second motion searches are performed for the LCU, for determining a second quad-tree, based on the cost function associated with a second plurality of PUs of the LCU. The first quad-tree or the second quad-tree is selected for performing encoding of the picture based on a comparison of a first cost of the first quad-tree with a second cost of the second quad-tree.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: January 30, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Naveen Srinivasamurthy, Soyeb Nagori
  • Publication number: 20240007648
    Abstract: The disclosure provides a sample adaptive offset (SAO) encoder. The SAO encoder includes a statistics collection (SC) block and a rate distortion optimization (RDO) block coupled to the SC block. The SC block receives a set of deblocked pixels and a set of original pixels. The SC block categorizes each deblocked pixel of the set of deblocked pixels in at least one of a plurality of band and edge categories. The SC block estimates an error in each category as difference between a deblocked pixel of the set of deblocked pixels and corresponding original pixel of the set of original pixels. The RDO block determines a set of candidate offsets associated with each category and selects a candidate offset with a minimum RD cost. The minimum RD cost is used by a SAO type block and a decision block to generate final offsets for the SAO encoder.
    Type: Application
    Filed: September 18, 2023
    Publication date: January 4, 2024
    Inventors: Hrushikesh Tukaram Garud, Mihir Narendra Mody, Soyeb Nagori
  • Patent number: 11856220
    Abstract: Several techniques aimed at reducing computational complexity when encoding uses bi-predictively encoded frames (B-frames) are implemented in a video encoder. In an embodiment, B-frames are not used as reference frames for encoding P-frames and other B-frames. Non-use of B-frames allows a de-blocking filter used in the video encoder to be switched off when reconstructing encoded B-frames, and use of a lower complexity filter for fractional-resolution motion search for B-frames. In another embodiment, cost functions used in motion estimation for B-frames are simplified to reduce computational complexity. In one more embodiment, fractional pixel refinement in motion search for B-frames is simplified. In yet another embodiment, predictors used in motion estimation for a macro-block in a P-frame are selected from a B-frame that uses a same reference frame as the P-frame.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: December 26, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Soyeb Nagori, Arun Shankar Kudana, Pramod Kumar Swami
  • Patent number: 11847184
    Abstract: A matching accelerator in the form of a hardware accelerator configured to perform matrix multiplication and/or additional operations is used to optimize keypoint matching. An SSE calculation may be determined by utilizing the matching accelerator to perform matrix multiplication to obtain a cost matrix for two sets of keypoint descriptors from two images. The hardware accelerator may determine a best cost calculation for each keypoint in each direction, which is utilized to perform keypoint matching.
    Type: Grant
    Filed: January 14, 2021
    Date of Patent: December 19, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Deepak Kumar Poddar, Soyeb Nagori, Hrushikesh Tukaram Garud, Pramod Kumar Swami
  • Patent number: 11831927
    Abstract: The disclosure provides a noise filter. The noise filter includes a motion estimation (ME) engine. The ME receives a current frame and a reference frame. The current frame comprising a current block and the reference frame includes a plurality of reference blocks. The ME engine generates final motion vectors. The current block comprises a plurality of current pixels. A motion compensation unit generates a motion compensated block based on the final motion vectors and the reference frame. The motion compensated block includes a plurality of motion compensated pixels. A weighted average filter multiplies each current pixel of the plurality of current pixels and a corresponding motion compensated pixel of the plurality of motion compensated pixels with a first weight and a second weight respectively. The weighted average filter generates a filtered block. A blockiness removal unit is coupled to the weighted average filter and removes artifacts in the filtered block.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: November 28, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Soyeb Nagori, Shyam Jagannathan, Deepak Kumar Poddar, Arun Shankar Kudana, Pramod Swami, Manoj Koul
  • Patent number: 11792399
    Abstract: Several methods, systems, and computer program products for quantization of video content are disclosed. In an embodiment, the method includes determining by a processing module, motion information associated with a block of video data of the video content. A degree of randomness associated with the block of video data is determined by the processing module based on the motion information. A value of a quantization parameter (QP) associated with the block of video data is modulated by a quantization module based on the determined degree of randomness.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: October 17, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Arun Shankar Kudana, Soyeb Nagori
  • Patent number: 11763575
    Abstract: Techniques including receiving a distorted image from a camera disposed about a vehicle, detecting, in the distorted image, corner points associated with a target object, mapping the corner points to a distortion corrected domain based on one or more camera parameters, mapping the corner points and lines between the corner points back to a distorted domain based on the camera parameters, interpolating one or more intermediate points to generate lines between the corner points in the distortion corrected domain mapping the corner points and the lines between the corner points back to a distorted domain based on the camera parameters, and adjusting a direction of travel of the vehicle based on the located target object.
    Type: Grant
    Filed: February 23, 2022
    Date of Patent: September 19, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Deepak Poddar, Soyeb Nagori, Manu Mathew, Debapriya Maji
  • Patent number: 11765359
    Abstract: The disclosure provides a sample adaptive offset (SAO) encoder. The SAO encoder includes a statistics collection (SC) block and a rate distortion optimization (RDO) block coupled to the SC block. The SC block receives a set of deblocked pixels and a set of original pixels. The SC block categorizes each deblocked pixel of the set of deblocked pixels in at least one of a plurality of band and edge categories. The SC block estimates an error in each category as difference between a deblocked pixel of the set of deblocked pixels and corresponding original pixel of the set of original pixels. The RDO block determines a set of candidate offsets associated with each category and selects a candidate offset with a minimum RD cost. The minimum RD cost is used by a SAO type block and a decision block to generate final offsets for the SAO encoder.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: September 19, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Hrushikesh Tukaram Garud, Mihir Narendra Mody, Soyeb Nagori
  • Patent number: 11763568
    Abstract: Estimation of the ground plane of a three dimensional (3D) point cloud based modifications to the random sample consensus (RANSAC) algorithm is provided. The modifications may include applying roll and pitch constraints to the selection of random planes in the 3D point cloud, using a cost function based on the number of inliers in the random plane and the number of 3D points below the random plane in the 3D point cloud, and computing a distance threshold for the 3D point cloud that is used in determining whether or not a 3D point in the 3D point cloud is an inlier of a random plane.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: September 19, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Soyeb Nagori, Poorna Kumar, Manu Mathew, Prashanth Ramanathpur Viswanath, Deepak Kumar Poddar
  • Patent number: 11743471
    Abstract: Method and system to improve the performance of a video encoder. The method includes processing an initial video signal in a front-end image pre-processor to obtain a processed video signal and processor information respecting the signal, providing the processed video signal and the processor information to a video encoder, and encoding the video signal in the video encoder according to the processor information to provide an encoded video signal for storage. The system includes a video pre-processor connectable to receive an initial video signal. The video encoder in communication with the video pre-processor receives a processed video signal and a processor information. A storage medium in communication with the video encoder stores an encoded video signal.
    Type: Grant
    Filed: September 28, 2021
    Date of Patent: August 29, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Naveen Srinivasamurthy, Manoj Koul, Soyeb Nagori, Peter Labaziewicz, Kedar Chitnis