Patents by Inventor Spencer Isaacson

Spencer Isaacson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9599977
    Abstract: A power train may have a power train input and a power train output, wherein the power train is configured to transfer electrical energy from the power train input to a load coupled to the power train output in conformity with one or more power train control signals. A scheduler may be configured to receive events from the power train and, responsive to each particular event, schedule execution of a thread of control instructions responsive to the particular event, wherein the thread is selected from a plurality of threads. A processor may be configured to execute the threads of control instructions scheduled by the scheduler, such that for each particular event the processor generates one or more power train control signals responsive to the particular event within a first switching cycle of receipt of the particular event or within a second switching cycle immediately subsequent to the first switching cycle.
    Type: Grant
    Filed: March 5, 2014
    Date of Patent: March 21, 2017
    Assignee: Cirrus Logic, Inc.
    Inventors: Jean C. Pina, John L. Melanson, Robert T. Grisamore, Eric J. King, Spencer Isaacson
  • Patent number: 9184666
    Abstract: A system and method include a controller that reduces power dissipated by a switch, such as a source-controlled field effect transistor, when an estimated amount of power dissipated by the switch exceeds a predetermined threshold. Reducing the power dissipated by the switch prevents damage to the switch due to overheating. The controller determines the estimated amount of power dissipated by the switch using actual drain-to-source current and drain voltage data. In at least one embodiment, the controller includes a fail-safe, estimated power dissipation determination path that activates when the drain voltage data fails a reliability test. Additionally, in at least one embodiment, the controller includes a model of thermal characteristics of the switch. In at least one embodiment, the controller utilizes real-time estimated power dissipation by the switch and the model to determine when the estimated power dissipated by the switch exceeds a power dissipation protection threshold.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: November 10, 2015
    Inventors: Mohit Sood, Spencer Isaacson, Rahul Singh, Zhaohui He
  • Publication number: 20140028213
    Abstract: A system and method include a controller that reduces power dissipated by a switch, such as a source-controlled field effect transistor, when an estimated amount of power dissipated by the switch exceeds a predetermined threshold. Reducing the power dissipated by the switch prevents damage to the switch due to overheating. The controller determines the estimated amount of power dissipated by the switch using actual drain-to-source current and drain voltage data. In at least one embodiment, the controller includes a fail-safe, estimated power dissipation determination path that activates when the drain voltage data fails a reliability test. Additionally, in at least one embodiment, the controller includes a model of thermal characteristics of the switch. In at least one embodiment, the controller utilizes real-time estimated power dissipation by the switch and the model to determine when the estimated power dissipated by the switch exceeds a power dissipation protection threshold.
    Type: Application
    Filed: March 15, 2013
    Publication date: January 30, 2014
    Inventors: Mohit Sood, Spencer Isaacson, Rahul Singh, Zhaohui He