Abstract: Sensors SE and drivers AT electrically linked to various points of communication equipment, e.g. in a telephone system, are periodically explored by an interface linking them with a processor, under the control of a time base successively reading out their addresses during synchronous phases of respective time slots of a recurrent frame also having other phases set aside for the asynchronous exchange of data with the processor. The interface comprises a first and a second read/write memory ME.sub.1, ME.sub.2 respectively storing information relating to the evaluation of incoming signals from the sensors and to the sending of outgoing signals to the drivers, the contents of these memories being updated from time to time during asynchronous phases allocated to communication with the processor. The evaluation of incoming signals is performed in a first logic network IN, with the aid of integrating circuitry including a read-only memory ROM.sub.1 inserted in a feedback loop of the incoming-signal memory ME.sub.

Abstract: Sensors SE and actuators AT electrically linked to groups of circuit components to be monitored, e.g. in a central office of a telephone system, are connected to a preprocessor, interfacing them with a microprocessor, which detects an incoming request signal from any group and, after evaluation, sends it on to the microprocessor, causing the latter to emit a confirmation signal which the preprocessor transmits to the corrsponding group actuator. A component-identification signal received from that group and evaluated by the preprocessor is then forwarded to the microprocessor which thereupon, through the preprocessor, instructs the corresponding component actuator to send out an enabling signal to the component thus identified. A response by that component, in the form of an error signal, also undergoes evaluation in the preprocessor and is then passed on to the microprocessor where it is classified and read out to a printer.

Abstract: A signal detector monitoring the presence or absence of line currents in a multiplicity of circuits of a telecommunication system includes an orthogonal matrix MN of magnetic-core sensors divided into (m+1) rows and (n+1) columns. The cores of the first m rows and first n columns constitute active sensors provided with respective writing conductors extending from m.multidot.n monitored circuits. A duplicated first set of wires 1A, 1B, each coacting with the cores of one row, are successively energized with interrogation and resetting currents in the course of a scanning cycle; a duplicated second set of wires 2A, 2B, each coacting with the cores of one column, terminate at respective sense amplifiers AS which read the states of the interrogated cores and load the detected responses into a buffer register RPP from which they are serially read out to a processor DU.

Abstract: To facilitate the supervision of long-distance telephone traffic over an extended area, output signals from call monitors associated with a number of trunk lines are fed to respective detectors working into a common preprocessor in which certain parameters of toll calls carried by each of these trunk lines, such as number and length of engagements, number and length of conversations and number of metering pulses, are registered in real time with the aid of respective counters for subsequent transfer to a final processor. The contents of each counter are read out to a buffer memory, within the preprocessor, upon the termination of the respective call or at any time in response to an external command. The preprocessor may be duplicated in order to minimize the effect of malfunctions, with inhibition of the loading and unloading of the counters of either unit until a confirmation signal is received from the other unit or a certain number of operating cycles have elapsed.