Abstract: An example apparatus includes: controller circuitry configured to: provide switch signals to capacitive digital to analog converter (C-DAC) circuitry, the C-DAC circuitry including switches; configuring the switches into a third configuration begin an Auto Zero (AZ) phase with a third switch in a closed state; configuring the switches into a fourth configuration to repeat the transition of the third switch to the open state corresponding to a first configuration; configuring the switches into a fifth configuration to repeat the transition of a first switch and a second switch to the open state corresponding to a second configuration; configuring the switches into a sixth configuration to repeat the transition of the third switch to the closed state corresponding to a second configuration; and performing an AZ decision with the switches in the sixth configuration.

Abstract: In described examples, a circuit includes an integrator. The integrator generates a first signal responsive to an input signal. A trigger circuit is coupled to the integrator and receives the first signal. A charge dump circuit is coupled to the integrator and the trigger circuit. The trigger circuit modifies configuration of the charge dump circuit and the integrator when the first signal is greater than a first threshold.

Abstract: An example apparatus includes: controller circuitry configured to: provide switch signals to capacitive digital to analog converter (C-DAC) circuitry, the C-DAC circuitry including switches; configuring the switches into a third configuration begin an Auto Zero (AZ) phase with a third switch in a closed state; configuring the switches into a fourth configuration to repeat the transition of the third switch to the open state corresponding to a first configuration; configuring the switches into a fifth configuration to repeat the transition of a first switch and a second switch to the open state corresponding to a second configuration; configuring the switches into a sixth configuration to repeat the transition of the third switch to the closed state corresponding to a second configuration; and performing an AZ decision with the switches in the sixth configuration.

Abstract: In described examples, a circuit includes an integrator. The integrator generates a first signal responsive to an input signal. A trigger circuit is coupled to the integrator and receives the first signal. A charge dump circuit is coupled to the integrator and the trigger circuit. The trigger circuit modifies configuration of the charge dump circuit and the integrator when the first signal is greater than a first threshold.

Abstract: In at least one example, a circuit includes an amplifier, a first feedback loop, and a second feedback loop. The amplifier includes an amplifier input and an amplifier output. The first feedback loop includes a first feedback capacitor and a first switch. The first feedback loop is coupled between the amplifier input and the amplifier output. The first feedback capacitor is coupled to the amplifier output through the first switch. The second feedback loop includes a second feedback capacitor and a second switch. The second feedback loop is coupled in parallel with the first feedback loop between the amplifier input and the amplifier output. The second feedback capacitor is coupled to the amplifier input and to the first feedback capacitor through the second switch.

Abstract: A circuit includes an amplifier having an input and an output. A voltage comparator has an input and first and second outputs. The input of the voltage comparator is coupled to the output of the amplifier. A variable capacitor circuit is coupled between the input and the output of the amplifier and is coupled to the first output of the voltage comparator. A charge dump circuit has an input and an output. The input of the charge dump circuit is coupled to the second output of the voltage comparator. The output of the charge dump circuit is coupled to the input of the amplifier.

Abstract: In described examples, a circuit includes an integrator. The integrator receives an input signal. A first sampling network is coupled to the integrator and generates a signal voltage. A second sampling network is coupled to the integrator and generates a pixel sampled noise voltage. The pixel sampled noise voltage generated in a previous cycle is subtracted from the signal voltage generated in a current cycle to generate a true signal voltage.

Abstract: In described examples, a circuit includes an integrator. The integrator generates a first signal responsive to an input signal. A trigger circuit is coupled to the integrator and receives the first signal. A charge dump circuit is coupled to the integrator and the trigger circuit. The trigger circuit modifies configuration of the charge dump circuit and the integrator when the first signal is greater than a first threshold.

Abstract: In described examples, a circuit includes an integrator. The integrator receives an input signal. A first sampling network is coupled to the integrator and generates a signal voltage. A second sampling network is coupled to the integrator and generates a pixel sampled noise voltage. The pixel sampled noise voltage generated in a previous cycle is subtracted from the signal voltage generated in a current cycle to generate a true signal voltage.

Abstract: In accordance with one embodiment, an apparatus includes a first amplifier having a noninverting input, an inverting input and an output. The noninverting input is coupled to a first ground reference. The inverting input is coupled to an output of an external sensor. The apparatus also includes a second amplifier having a noninverting input, an inverting input and an output. The noninverting input is coupled to the first ground reference. The inverting input is coupled to the power supply through a first variable capacitor and to the second ground reference through a second variable capacitor. The output is coupled to the inverting input of the first amplifier. The external sensor is coupled to a third ground reference, and the first amplifier and second amplifier are coupled to the second ground reference.

Abstract: In accordance with one embodiment, an apparatus includes a first amplifier having a noninverting input, an inverting input and an output. The noninverting input is coupled to a first ground reference. The inverting input is coupled to an output of an external sensor. The apparatus also includes a second amplifier having a noninverting input, an inverting input and an output. The noninverting input is coupled to the first ground reference. The inverting input is coupled to the power supply through a first variable capacitor and to the second ground reference through a second variable capacitor. The output is coupled to the inverting input of the first amplifier. The external sensor is coupled to a third ground reference, and the first amplifier and second amplifier are coupled to the second ground reference.

Abstract: An active pixel sensor a plurality of sensor pixels disposed in a row, a plurality of sensor pixels in a column, and steering circuitry coupled to each of the sensor pixels. Each of the sensor pixels includes a first pixel circuit, and a second pixel circuit. For each of the sensor pixels, the steering circuitry includes a first switch, a second switch, a third switch, and a fourth switch. The first switch and the second switch are connected in series to route an input signal to the first pixel circuit. The third switch and a fourth switch are connected in parallel to route the input signal to the second pixel circuit.

Abstract: An active pixel sensor a plurality of sensor pixels disposed in a row, a plurality of sensor pixels in a column, and steering circuitry coupled to each of the sensor pixels. Each of the sensor pixels includes a first pixel circuit, and a second pixel circuit. For each of the sensor pixels, the steering circuitry includes a first switch, a second switch, a third switch, and a fourth switch. The first switch and the second switch are connected in series to route an input signal to the first pixel circuit. The third switch and a fourth switch are connected in parallel to route the input signal to the second pixel circuit.