Abstract: A method of selective formation of silicide on a semiconductor wafer, wherein the metal layer is deposited over the entire wafer prior to application of the SiProt mask such that any etching of the mask does not cause any surface deterioration of the silicon wafer.

Abstract: Silicon wafers and the like are cleaned using new scrubber-type apparatus in which measures are taken to compensate for differential cleaning of the central region of the wafer by: using rotary brushes having one or more non-contact portions arranged in the section thereof that faces the central region of the substrate, or toggling the relative position of the wafer and the rotary brushes, or directing cleaning fluid(s) preferentially towards the central region of the wafer. Another aspect of the invention provides scrubber-type cleaning apparatus in which the rotary brushes are replaced by rollers (110). A web of cleaning material (116) is interposed between each roller and the substrate. Various different webs of cleaning material may be used, e.g. a length of tissue, a continuous loop of cleaning material whose surface is reconditioned on each cleaning pass, adhesive material provided on a carrier tape, etc.

Abstract: A process for the formation of a capping layer on a conducting interconnect for a semiconductor device is provided, the process comprising the steps of: (a) providing one or more conductors in a dielectric layer, and (b) depositing a capping layer on an upper surface of at least some of the one or more conductors, characterized in that the process further includes: (c) the step of, prior to depositing the capping layer, reacting the dielectric layer with an organic compound in a liquid phase, the said organic compound having the following general formula: (I) where X is a functional group, R is an organic group or a organosiloxane group, Y1 is either a functional group or an organic group or organosiloxane group, and Y2 is either a functional group or an organic group or organosiloxane group, and where the functional group(s) is/are independently selected from the following: NH2, a secondary amine, a tertiary amine, acetamide, trifluoroacetamide, imidazole, urea, OH, an alkyoxy, acryloxy, acetate, SH, an alky

Abstract: The present invention relates to a cost saving liquid-treatment unit (100). According to the invention, a control unit (152), which is connected to an input port of a control valve (118, 120, 122), is adapted to set, in dependence on the evaporation rate of a treatment liquid on the substrate at the given or desired temperature of the substrate and/or at the given or desired pressure of a gaseous ambient atmosphere at the substrate, a number of dispense pulses to be applied to the substrate for the liquid treatment, a respective pulse duration of individual dispense pulses, and respective dispense-interruption time spans between the individual dispense pulses. This way, the use of treatment liquid is reduced to a minimum amount, thus reducing costs for providing and cleaning treatment liquid.

Abstract: Consistent with an example embodiment, there is a semiconductor device with nanowire-type interconnect elements. The semiconductor device comprises a semiconductor substrate with a pn junction formed by a first doped substrate region of a first conductivity type, and a second doped substrate region of an opposite second conductivity type. There is a layer structure on the semiconductor substrate, the layer structure includes a first metal structure which is conductively connected with the first doped substrate region, and further comprising a second metal structure, which is conductively connected with the second doped substrate region. The layer structure allows the transmission of photons with an energy suitable for creating free charge carriers in the first and second doped substrate regions. A third metal structure comprising at least one self-assembled metal dendrite forms an interconnect element between the first and second metal structures.

Abstract: The present invention relates to a semiconductor device with nanowire-type interconnect elements and a method for fabricating the same. The device comprises a metal structure with at least one self-assembled metal dendrite and forming an interconnect element (424) between a first and a second metal structure.

Abstract: The invention provides a method and a device for determining the temperature of a semiconductor substrate. A resonance circuit (110) is provided on the semiconductor substrate and is formed by a junction capacitor (11) and an inductor (12). The substrate is placed on a holder and the resonance circuit (110) is irradiated with electromagnetic energy of an electromagnetic field (5) generated by a radiation device (200). A resonance frequency of the resonance circuit (110) is determined by detecting an effect of the resonance circuit (110) on the irradiated electromagnetic field (5), and a temperature of the semiconductor substrate is determined as a function of the resonance frequency. The method and device according to the invention provide for a more accurate determination of the temperature of the semiconductor substrate due to an increased sensitivity to the temperature of the junction capacitor (11).

Abstract: A passivating coupling material for, on the one hand, passivating a dielectric layer in a semiconductor device, and on the other hand, for permitting or at least promoting liquid phase metal deposition thereon in a subsequent process step. In a particular example, the dielectric layer may be a porous material having a desirably decreased dielectric constant k, and the passivating coupling material provides steric shielding groups that substantially block the adsorption and uptake of ambient moisture into the porous dielectric layer. The passivating coupling materials also provides metal nucleation sides for promoting the deposition of a metal thereon in liquid phase, in comparison with metal deposition without the presence of the passivating coupling material. The use of a liquid phase metal deposition process facilitates the subsequent manufacture of the semiconductor device.

Abstract: A system for removing particles from a polishing pad to improve the efficiency of the removal of material by the polishing pad as part of a chemical-mechanical polishing process, the system comprising a polishing pad; a fluid dispenser arranged to dispense a fluid on the polishing pad; and removal means, wherein the removal means include a heater for increasing the temperature of the fluid dispensed on the polishing pad, and/or voltage means for coupling the polishing pad to a voltage source for repelling charged particles from the polishing pad surface while the fluid dispenser is dispensing the fluid on the polishing pad.

Abstract: A material for passivating a dielectric layer in a semiconductor device has a molecular structure permitting or at least promoting liquid phase metal deposition thereon in a subsequent process step. The contemplated material may be constituted by multiple organic components. A semiconductor device including a layer of the passivating coupling material, and a method of manufacturing such a semiconductor device are also contemplated.

Abstract: A passivating coupling material for, on the one hand, passivating a dielectric layer in a semiconductor device, and on the other hand, for permitting or at least promoting liquid phase metal deposition thereon in a subsequent process step. In a particular example, the dielectric layer may be a porous material having a desirably decreased dielectric constant k, and the passivating coupling material provides steric shielding groups that substantially block the adsorption and uptake of ambient moisture into the porous dielectric layer. The passivating coupling materials also provides metal nucleation sides for promoting the deposition of a metal thereon in liquid phase, in comparison with metal deposition without the presence of the passivating coupling material. The use of a liquid phase metal deposition process facilitates the subsequent manufacture of the semiconductor device.

Abstract: A passivating coupling material for, on the one hand, passivating a dielectric layer in a semiconductor device, and on the other hand, for permitting or at least promoting liquid phase metal deposition thereon in a subsequent process step. In a particular example, the dielectric layer may be a porous material having a desirably decreased dielectric constant k, and the passivating coupling material provides steric shielding groups that substantially block the adsorption and uptake of ambient moisture into the porous dielectric layer. The passivating coupling materials also provides metal nucleation sides for promoting the deposition of a metal thereon in liquid phase, in comparison with metal deposition without the presence of the passivating coupling material. The use of a liquid phase metal deposition process facilitates the subsequent manufacture of the semiconductor device.

Abstract: The present invention relates to a semiconductor device with nanowire-type interconnect elements and a method for fabricating the same. The device comprises a metal structure with at least one self-assembled metal dendrite and forming an interconnect element (424) between a first and a second metal structure.

Abstract: A method of selective formation of suicide on a semiconductor wafer, wherein the metal layer (12) is deposited over the entire wafer prior to application of the SiProt mask (10, 16, 22) such that any etching of the mask (10, 16, 22) does not cause any surface deterioration of the silicon wafer.

Abstract: A system for processing a semiconductor substrate during fabrication of semiconductor devices provides a plurality of semiconductor substrate processing stations in a physically integrated system, as well as a semiconductor substrate transport system for transporting a semiconductor substrate between the respective processing stations. In particular, the processing system according to the present invention favors the use of liquid phase process steps, particularly deposition process steps, instead of gas or vapor phase processing. Even more particularly, the system contemplates deposition of a metallic barrier layer 30 on the semiconductor substrate in liquid phase.

Abstract: The invention relates to a method of manufacturing a semiconductor device (10) with a substrate (11) and a semiconductor body (2) which is provided with at least one semiconductor element and the surface of which is provided with an aluminum layer (3) that is patterned by means of a chemical-mechanical polishing process, the side of the device (10) covered with the aluminum layer (3) being pressed against a polishing pad (5), the device (10) and the pad (5) being moved with respect to each other, a slurry (6) containing an abrasive and having a pH level lower than about 12 being applied between the device (10) and the pad (5), and the polishing process being continued till a sufficient amount of the aluminum layer (3) has been removed. According to the invention, the slurry (6) between the device (10) and the pad (5) is provided with a pH level lower than 5 and the pH level is created using merely an acid the aluminum salt of which dissolves well in the slurry (6).

Abstract: A carrier head (100) for a CMP tool, wherein the membrane (108) defining a chamber with a contact surface (102) of the carrier head (100) has a number of integral tubes (110) termining in openings coupled directly to the substrate (106), in addition to a main fluid flow passage (104) coupled to the chamber defined by the membrane (108). In use, during loading and polishing, a vacuum is applied to the main fluid flow passage (104) and the tubes (110) to hold the substrate (106) in flat engagement with the membrane (108) and contact surface (102). In order to unload the substrate (106), fluid pressure is applied to the substrate (106) via the tubes (110), whilst maintaining the application of the vacuum via the main fluid flow passage (104) so as to minimise bending and breakage of the substrate (106).

Abstract: The invention provides a method and a device for determining the temperature of a semiconductor substrate. A resonance circuit (110) is provided on the semiconductor substrate and is formed by a junction capacitor (11) and an inductor (12). The substrate is placed on a holder and the with electromagnetic energy of an electromagnetic field (5) generated by a radiation device (200). A circuit (110) is determined by detecting an effect of the resonance circuit (110) on the irradiated temperature of the semiconductor substrate is determined as a function of the resonance frequency. The method and device according to the invention provide for a more accurate determination of the temperature of the semiconductor substrate due to an increased sensitivity to the temperature of the junction capacitor (11).

Abstract: A material for passivating a dielectric layer in a semiconductor device has a molecular structure permitting or at least promoting liquid phase metal deposition thereon in a subsequent process step. The contemplated material may be constituted by multiple organic components. A semiconductor device including a layer of the passivating coupling material, and a method of manufacturing such a semiconductor device are also contemplated.

Abstract: The present invention relates to a cost saving liquid-treatment unit (100). According to the invention, a control unit (152), which is connected to an input port of a control valve (118, 120, 122), is adapted to set, in dependence on the evaporation rate of a treatment liquid on the substrate at the given or desired temperature of the substrate and/or at the given or desired pressure of a gaseous ambient atmosphere at the substrate, a number of dispense pulses to be applied to the substrate for the liquid treatment, a respective pulse duration of individual dispense pulses, and respective dispense-interruption time spans between the individual dispense pulses. This way, the use of treatment liquid is reduced to a minimum amount, thus reducing costs for providing and cleaning treatment liquid.