Abstract: A packet routing system is provided that comprises a processor, a component, a resource map and a resource map manger. The component classifies an incoming packet of a user session. The resource map identifies a plurality of resources used to process the incoming packet. The resource map manager determines an availability of at least some of the resources and based on the availability either promote processing the incoming packet or drop the incoming packet.

Abstract: An apparatus for use in a first packet switching device that transmits outgoing data packets to a second packet switching device over N heterogeneous data links. The first packet switching device comprises N packet queues for storing outgoing data packets. The apparatus selects one of the N heterogeneous data links to transmit a first outgoing data packet. The apparatus comprises a controller that calculates a packet delay value for each one of a subset of S of the N heterogeneous data links. The packet delay (PD) value for each data link is determined as a function of i) a propagation delay (D) of the data link; ii) a packet size (PS) of the first outgoing data packet; iii) a queue size (QS) of a packet queue associated with the data link; and iv) a bandwidth (BW) of the data link.

Abstract: A dynamic scheduling system is provided that comprises a processor, a polling task, a work task, and a scheduler assistant task. The polling task is configured for execution by the processor, wherein the polling task executes during a first CPU time window and sleeps during a second CPU time window. The work task is configured for an execution during the second CPU time window. The scheduler assistant (SA) task has an execution state to indicate to the polling task a status of the execution of the work task to the polling task. The SA task is configured to run if the work task runs to completion within the second CPU time window.

Abstract: A system is provided that includes a hardware forwarding engine that routes data packets. The system also comprises a processor coupled to the hardware forwarding engine, the processor having a software forwarding engine that routes data packets. If data packets are forwarded from the hardware forwarding engine to the software forwarding engine, the hardware forwarding engine provides route lookup results for at least some of the data packets forwarded to the software forwarding engine.

Abstract: A packet routing system is provided that comprises a processor, a component, a resource map and a resource map manger. The component classifies an incoming packet of a user session. The resource map identifies a plurality of resources used to process the incoming packet. The resource map manager determines an availability of at least some of the resources and based on the availability either promote processing the incoming packet or drop the incoming packet.

Abstract: A dynamic scheduling system is provided that comprises a processor, a polling task, a work task, and a scheduler assistant task. The polling task is configured for execution by the processor, wherein the polling task executes during a first CPU time window and sleeps during a second CPU time window. The work task is configured for an execution during the second CPU time window. The scheduler assistant (SA) task has an execution state to indicate to the polling task a status of the execution of the work task to the polling task. The SA task is configured to run if the work task runs to completion within the second CPU time window.

Abstract: In a distributed router containing routing nodes connected by a switch fabric, an input-output processor for use in the routing nodes. The input-out processor comprises: 1) an input interface controller for receiving incoming data packets from N input links; 2) an output interface controller for transmitting outgoing data packets to the switch fabric via a first uplink and a second uplink. Each of the N input links is assigned to one of the first and second uplinks so that incoming data packets from each input link are transmitted to the switch fabric by the assigned one of the first and second uplinks.

Abstract: A system is provided that includes a hardware forwarding engine that routes data packets. The system also comprises a processor coupled to the hardware forwarding engine, the processor having a software forwarding engine that routes data packets. If data packets are forwarded from the hardware forwarding engine to the software forwarding engine, the hardware forwarding engine provides route lookup results for at least some of the data packets forwarded to the software forwarding engine.

Abstract: A system is provided that includes a hardware forwarding engine that performs policy based routing. The system also comprises a processor coupled to the hardware forwarding engine, the processor having a software forwarding engine that performs policy based routing. If a data packet is forwarded from the hardware forwarding engine to the software forwarding engine, the hardware forwarding engine modifies a header of the data packet to include policy information.

Abstract: An apparatus for use in a first packet switching device that transmits outgoing data packets to a second packet switching device over N heterogeneous data links. The first packet switching device comprises N packet queues for storing outgoing data packets. The apparatus selects one of the N heterogeneous data links to transmit a first outgoing data packet. The apparatus comprises a controller that calculates a packet delay value for each one of a subset of S of the N heterogeneous data links. The packet delay (PD) value for each data link is determined as a function of i) a propagation delay (D) of the data link; ii) a packet size (PS) of the first outgoing data packet; iii) a queue size (QS) of a packet queue associated with the data link; and iv) a bandwidth (BW) of the data link.

Abstract: In a distributed router containing routing nodes connected by a switch fabric, an input-output processor for use in the routing nodes. The input-out processor comprises: 1) an input interface controller for receiving incoming data packets from N input links; 2) an output interface controller for transmitting outgoing data packets to the switch fabric via a first uplink and a second uplink. Each of the N input links is assigned to one of the first and second uplinks so that incoming data packets from each input link are transmitted to the switch fabric by the assigned one of the first and second uplinks.

Abstract: An electronic messaging system comprises a message receiving unit for receiving an electronic message, the electronic message being encoded in a first mailing format, wherein the electronic message includes at least a receiving address information containing the address of the receiving computer or the receiving computers, the electronic message should be sent to, and scheduling information. Furthermore, a message decoding unit is provided for decoding an electronic message received by the message receiving unit, thereby generating a decoded message. A message analyzing unit for analyzing the decoded message is adapted to determine the receiving computer or the receiving computers the electronic message should be sent to and to determine the scheduling information.