Patents by Inventor Sreekantha Madhava Katla

Sreekantha Madhava Katla has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7596773
    Abstract: Automating optimal placement of macro-blocks in the design of an integrated circuit. A first set of placements is generated and corresponding measures of optimalness for each placement is computed. A new set of placements is generated, with each placement being generated from multiple (“chosen placements”) of the first set of placements. The position of each macro in the new placement is made to be at least substantially identical to the position of the corresponding macro in one of the chosen placements. The placements having high values of optimalness are selected to be the chosen placements, thereby causing the properties of desirable placements to be propagated to new set of placements, as is common in genetic evolution. Another aspect of the present invention enables automatic removal of overlaps in a placement.
    Type: Grant
    Filed: March 2, 2006
    Date of Patent: September 29, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Thenappan Meyyappan, Senthil Arasu Thirunavukarasu, Sreekantha Madhava katla, Ramesh S Guzar
  • Patent number: 7058912
    Abstract: The status of execution of jobs (used to characterize cells) is notified asynchronously. As a result, the processing and network resources may be optimally used. In an embodiment, a flow controller divides an entire characterization task into multiple jobs, and schedules each job for execution on one of several client machines. The client machine sends a notification asynchronously after completion of execution of the job. In an embodiment, the asynchronous communication is implemented using socket interface on top of TCP/IP protocol.
    Type: Grant
    Filed: September 2, 2003
    Date of Patent: June 6, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Sreekantha Madhava Katla, Omkumar Seshadri
  • Patent number: 6904579
    Abstract: Reducing the time required to measure constraint parameters (setup time, hold time and pulse width) of components in integrated circuits. For example, the delay of propagation of a signal between an input node and an intermediate node of a component are measured. An approximate range of possible values is formulated, and a search (by applying signals assuming one of the values in the approximate range and examining the output signal(s)) is conducted within the range to determine the value of the constraint parameters.
    Type: Grant
    Filed: April 1, 2003
    Date of Patent: June 7, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Sreekantha Madhava Katla, Vikas K. Prasad, Suravi Bhowmik, Kalpesh Amruthlal Shah
  • Publication number: 20040199888
    Abstract: Reducing the time required to measure constraint parameters (setup time, hold time and pulse width) of components in integrated circuits. For example, the delay of propagation of a signal between an input node and an intermediate node of a component are measured. An approximate range of possible values is formulated, and a search (by applying signals assuming one of the values in the approximate range and examining the output signal(s)) is conducted within the range to determine the value of the constraint parameters.
    Type: Application
    Filed: April 1, 2003
    Publication date: October 7, 2004
    Applicant: Texas Instruments Incorporated
    Inventors: Sreekantha Madhava Katla, Vikas K. Prasad, Suravi Bhowmik, Kalpesh Amruthlal Shah