Patents by Inventor Sreeker R. Dundigal

Sreeker R. Dundigal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Active diode having no gate and no shallow trench isolation
    Patent number: 9368648
    Abstract: An active diode with fast turn-on time, low capacitance, and low turn-on resistance may be manufactured without a gate and without a shallow trench isolation region between doped regions of the diode. A short conduction path in the active diode allows a fast turn-on time, and a lack of gate oxide reduces susceptibility of the active diode to extreme voltages. The active diode may be implemented in integrated circuits to prevent and reduce damage from electrostatic discharge (ESD) events. Manufacturing the active diode is accomplished by depositing a salicide block between doped regions of the diode before salicidation. After the salicide layers are formed on the doped regions, the salicide block is removed.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: June 14, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Reza Jalilizeinali, Eugene R. Worley, Evan Siansuri, Sreeker R. Dundigal
  • Distributed building blocks of R-C clamping circuitry in semiconductor die core area
    Patent number: 8531806
    Abstract: A semiconductor die includes resistor-capacitor (RC) clamping circuitry for electrostatic discharge (ESD) protection of the semiconductor die. The RC clamping circuitry includes building blocks distributed in the pad ring and in the core area of the semiconductor die. The building blocks include at least one capacitor block in the core area. The RC clamping circuitry also includes chip level conductive layer connections between each of the distributed building blocks.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: September 10, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Reza Jalilizeinali, Evan Siansuri, Sreeker R. Dundigal, Eugene R. Worley
  • DISTRIBUTED BUILDING BLOCKS OF R-C CLAMPING CIRCUITRY IN SEMICONDUCTOR DIE CORE AREA
    Publication number: 20120224284
    Abstract: A semiconductor die includes resistor-capacitor (RC) clamping circuitry for electrostatic discharge (ESD) protection of the semiconductor die. The RC clamping circuitry includes building blocks distributed in the pad ring and in the core area of the semiconductor die, The building blocks include at least one capacitor block in the core area, The RC clamping circuitry also includes chip level conductive layer connections between each of the distributed building blocks.
    Type: Application
    Filed: June 30, 2011
    Publication date: September 6, 2012
    Applicant: QUALCOMM Incorporated
    Inventors: Reza Jalilizeinali, Evan Siansuri, Sreeker R. Dundigal, Eugene R. Worley
  • Active Diode Having No Gate and No Shallow Trench Isolation
    Publication number: 20110084362
    Abstract: An active diode with fast turn-on time, low capacitance, and low turn-on resistance may be manufactured without a gate and without a shallow trench isolation region between doped regions of the diode. A short conduction path in the active diode allows a fast turn-on time, and a lack of gate oxide reduces susceptibility of the active diode to extreme voltages. The active diode may be implemented in integrated circuits to prevent and reduce damage from electrostatic discharge (ESD) events. Manufacturing the active diode is accomplished by depositing a salicide block between doped regions of the diode before salicidation. After the salicide layers are formed on the doped regions, the salicide block is removed.
    Type: Application
    Filed: March 31, 2010
    Publication date: April 14, 2011
    Applicant: QUALCOMM Incorporated
    Inventors: Reza Jalilizeinali, Eugene R. Worley, Evan Siansuri, Sreeker R. Dundigal