Patents by Inventor Sreenivas Kothandaraman

Sreenivas Kothandaraman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230385985
    Abstract: Methods, systems and apparatuses provide for encoder technology that conducts a spatial transformation on tiles in a block of an image, wherein the spatial transformation is conducted on a per tile basis and results in a first sub-band data and second sub-band data, predicts residual data from the first sub-band data, and generates quantization data from the second sub-band data, wherein the residual data and the quantization data represent a lossy compressed portion of the image. Additionally, decoder technology may recover first sub-band data from residual data, scale up to second sub-band data from quantization data, wherein the residual data and the quantization data represent a lossy compressed portion of an image, and conduct an inverse spatial transformation on the first sub-band data and the second sub-band data, wherein the inverse spatial transformation is conducted on a per tile basis and results in tiles in a block of the image.
    Type: Application
    Filed: May 25, 2022
    Publication date: November 30, 2023
    Inventors: Sreenivas Kothandaraman, Abhishek R. Appu, Prosun Chatterjee, Mohamed Farook
  • Publication number: 20230062540
    Abstract: Examples described herein relate to a manner of determining a number of bits to encode compression data. Some examples include: compressing pixel data of a region of pixels in a frame; determining a number of bits associated with at least two partitions; utilizing the determined number of bits to encode residual values generated from the compressing the pixel data; and storing the encoded residual values. In some examples, the at least two partitions comprise a first partition and a second partition. Some examples include: encoding residuals in the first partition using a number of bits associated with the first partition and encoding residuals in the second partition using a number of bits associated with the second partition.
    Type: Application
    Filed: August 18, 2021
    Publication date: March 2, 2023
    Inventors: Prasoonkumar SURTI, Abhishek R. APPU, Karol A. SZERSZEN, Karthik VAIDYANATHAN, Sreenivas KOTHANDARAMAN, Mohamed FAROOK
  • Publication number: 20230057492
    Abstract: Interleaving of variable bitrate streams for GPU implementations is described. An example of an apparatus includes one or more processors including a graphic processor, the graphics processor including a super-compression encoder pipeline to provide variable width interleaved coding; and memory for storage of data, wherein the graphics processor is to perform parallel dictionary encoding on a bitstream of symbols one of multiple workgroups, the workgroup to employ a plurality of encoders to generate a plurality of token-streams of variable lengths; create a histogram including at least tokens from the plurality of token-streams for the workgroup to generate an optimized entropy code; entropy code each of the plurality of token-streams for the workgroup into an encoded bitstream; and variably interleave the encoded bitstreams to generate an interleaved bitstream and bookkeep a size of the interleaved bitstream.
    Type: Application
    Filed: June 30, 2022
    Publication date: February 23, 2023
    Applicant: Intel Corporation
    Inventors: Sreenivas Kothandaraman, Stephen Junkins, Srihari Pratapa, Prasoonkumar Surti
  • Publication number: 20220301228
    Abstract: Variable width interleaved coding for graphics processing is described. An example of an apparatus includes one or more processors including a graphic processor; and memory for storage of data including data for graphics processing, wherein the graphics processor includes an encoder pipeline to provide variable width interleaved coding and a decoder pipeline to decode the variable width interleaved coding, and wherein the encoder pipeline is to receive a plurality of bitstreams from workgroups; perform parallel entropy encoding on the bitstreams to generate a plurality of encoded bitstreams for each of the workgroups; perform variable interleaving of the bitstreams for each workgroup based at least in part on data requirements for decoding received from the decoder pipeline; and compact outputs for each of the workgroups into a contiguous stream of interleaved data.
    Type: Application
    Filed: June 24, 2021
    Publication date: September 22, 2022
    Applicant: Intel Corporation
    Inventors: Stephen Junkins, Sreenivas Kothandaraman, Prasoonkumar Surti, Srihari Pratapa, William Hux, John Feit
  • Publication number: 20220084156
    Abstract: An apparatus to facilitate compression of memory data is disclosed. The apparatus comprises one or more processors to receive uncompressed data, adapt a format of the uncompressed data to a compression format, perform a color transformation from a first color space to a second color space, perform a residual computation to generate residual data, compress the residual data via entropy encoding to generate compressed data and packing the compressed data.
    Type: Application
    Filed: September 14, 2020
    Publication date: March 17, 2022
    Applicant: Intel Corporation
    Inventors: Sreenivas Kothandaraman, Karthik Vaidyanathan, Abhishek R. Appu, Karol Szerszen, Prasoonkumar Surti
  • Publication number: 20220051476
    Abstract: Apparatus and method for efficient graphics processing including ray tracing. For example, one embodiment of a graphics processor comprises: execution hardware logic to execute graphics commands and render images; an interface to couple functional units of the execution hardware logic to a tiled resource; and a tiled resource manager to manage access by the functional units to the tiled resource, a functional unit of the execution hardware logic to generate a request with a hash identifier (ID) to request access to a portion of the tiled resource, wherein the tiled resource manager is to determine whether a portion of the tiled resource identified by the hash ID exists, and if not, to allocate a new portion of the tiled resource and associate the new portion with the hash ID.
    Type: Application
    Filed: December 23, 2020
    Publication date: February 17, 2022
    Inventors: Sven Woop, Michael J. Doyle, Sreenivas Kothandaraman, Karthik Vaidyanathan, Abhishek R. Appu, Carsten Benthin, Prasoonkumar Surti, Holger GRUEN, Stephen Junkins, Adam Lake, Bret G. Alfieri, Gabor Liktor, Joshua Barczak, Won-Jong Lee
  • Publication number: 20220051466
    Abstract: Apparatus and method for compression of acceleration structure build data in a ray tracing implementation.
    Type: Application
    Filed: October 28, 2020
    Publication date: February 17, 2022
    Inventors: Michael Doyle, Sreenivas Kothandaraman
  • Publication number: 20220051467
    Abstract: Apparatus and method for efficient graphics processing including ray tracing. For example, one embodiment of a graphics processor comprises: execution hardware logic to execute graphics commands and render images; an interface to couple functional units of the execution hardware logic to a tiled resource; and a tiled resource manager to manage access by the functional units to the tiled resource, a functional unit of the execution hardware logic to generate a request with a hash identifier (ID) to request access to a portion of the tiled resource, wherein the tiled resource manager is to determine whether a portion of the tiled resource identified by the hash ID exists, and if not, to allocate a new portion of the tiled resource and associate the new portion with the hash ID.
    Type: Application
    Filed: December 23, 2020
    Publication date: February 17, 2022
    Inventors: Sven Woop, Michael J. Doyle, Sreenivas Kothandaraman, Karthik Vaidyanathan, Abhishek R. Appu, Carsten Benthin, Prasoonkumar Surti, Holger GRUEN, Stephen Junkins, Adam Lake, Bret G. Alfieri, Gabor Liktor, Joshua Barczak, Won-Jong Lee
  • Patent number: 8175147
    Abstract: Video encoding (such as H.263, MPEG-4, H.264/AVC) modifies TMN5-type rate control frame skipping and quantization parameter updating according to buffer fullness levels with I-frame initial quantization parameter values depend upon quantization parameter value of prior P-frames but also has within I-frame prediction and parameter increase to avoid excessive bits. And variable input frame rate is accommodated by adjusting buffer fullness measures. The quantization also applies to image compression.
    Type: Grant
    Filed: August 3, 2006
    Date of Patent: May 8, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Jennifer L. H. Webb, Sreenivas Kothandaraman
  • Patent number: 8045836
    Abstract: A method to record high frame rate video, compatible with existing industry standards, that permits selecting either slow-motion playback or true speed playback with synchronized audio.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: October 25, 2011
    Assignee: Texas Instruments Incorporated
    Inventors: Martin Austin Wand, Michael Andrew Hannah, Paul Bastian Fernandez, Sreenivas Kothandaraman
  • Publication number: 20110249889
    Abstract: Apparatus, systems, and methods disclosed herein operate to produce an image alignment shift vector used to shift left and right image portions of a stereoscopic image with respect to each other in order to reduce or eliminate undesirable horizontal and vertical disparity components. Vertical and horizontal projections of luminance value aggregations from selected left and right image pixel blocks are correlated to derive vertical and horizontal components of a disparity vector corresponding to each left/right pixel block pair. Disparity vectors corresponding to multiple image blocks are algebraically combined to yield the image alignment shift vector. The left and/or right images are then shifted in proportion to the magnitude of the image alignment shift vector at an angle corresponding to that of the image alignment shift vector.
    Type: Application
    Filed: April 7, 2011
    Publication date: October 13, 2011
    Inventors: Sreenivas Kothandaraman, Wei Hong, Aziz Batur
  • Patent number: 7782341
    Abstract: Rotation in the storage domain is a one-one function with the domain equal to the range. This permits an image to be rotated in place. Each image size implies at least one garland of closed chains of pixels. Each image includes a spanning set of these garlands. Rotation in place moves each pixel to the next location on its garland. On completion of a garland by return to the initial pixel, pixels on the next garland are moved. Image rotation is complete after all the garlands have been traversed.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: August 24, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Sreenivas Kothandaraman
  • Publication number: 20100208086
    Abstract: A system and method for performing video stabilization in a reduced memory video device. In one embodiment, a system includes a frame memory and a video stabilizer. The frame memory stores a first video frame and a second video frame acquired after the first video frame. The video stabilizer determines a motion vector indicative of movement of the system between acquisition of the first and second video frames. The determination is based, at least in part, on the first video frame. A number of pixels stored for the second video frame is greater than a number of pixels stored for the first video frame.
    Type: Application
    Filed: February 19, 2009
    Publication date: August 19, 2010
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sreenivas Kothandaraman, Aziz U. Batur
  • Patent number: 7576758
    Abstract: Rotation in the storage domain is a one-one function with the domain equal to the range. This permits an image to be rotated in place. Each image size implies at least one garland of closed chains of tiles. Each image includes a spanning set of these garlands. Rotation in place moves each pixel to the next location on its garland. On completion of a garland by return to the initial tile, tiles on the next garland are moved. Image rotation is complete after all the garlands have been traversed. This invention first linearized the two-dimensional tiles sliding into groups of super-pixels at contiguous locations above the image buffer. The tiles are rotated in place. The shuffled tiles are delinearized into rectangular blocks and then re-pitched if needed.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: August 18, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Sreenivas Kothandaraman, Joseph R. Zbiciak
  • Publication number: 20090180761
    Abstract: A method to record high frame rate video, compatible with existing industry standards, that permits selecting either slow-motion playback or true speed playback with synchronized audio.
    Type: Application
    Filed: December 24, 2008
    Publication date: July 16, 2009
    Inventors: Martin Austin Wand, Michael Andrew Hannah, Paul Bastian Fernandez, Sreenivas Kothandaraman
  • Publication number: 20080036791
    Abstract: Rotation in the storage domain is a one-one function with the domain equal to the range. This permits an image to be rotated in place. Each image size implies at least one garland of closed chains of pixels. Each image includes a spanning set of these garlands. Rotation in place moves each pixel to the next location on its garland. On completion of a garland by return to the initial pixel, pixels on the next garland are moved. Image rotation is complete after all the garlands have been traversed.
    Type: Application
    Filed: March 8, 2006
    Publication date: February 14, 2008
    Inventor: Sreenivas Kothandaraman
  • Publication number: 20060204130
    Abstract: Rotation in the storage domain is a one-one function with the domain equal to the range. This permits an image to be rotated in place. Each image size implies at least one garland of closed chains of tiles. Each image includes a spanning set of these garlands. Rotation in place moves each pixel to the next location on its garland. On completion of a garland by return to the initial tile, tiles on the next garland are moved. Image rotation is complete after all the garlands have been traversed. This invention first linearized the two-dimensional tiles sliding into groups of super-pixels at contiguous locations above the image buffer. The tiles are rotated in place. The shuffled tiles are delinearized into rectangular blocks and then re-pitched if needed.
    Type: Application
    Filed: March 8, 2006
    Publication date: September 14, 2006
    Inventors: Sreenivas Kothandaraman, Joseph Zbiciak
  • Publication number: 20060106900
    Abstract: A media system is disclosed which presorts media files thereby alleviating a media player from having to actively sort the files in real time. The system creates and uses presort information with the media files. The presort information contains one or more lists of the media files previously presorted according to different sorting criteria. The presort information permits a user the ability to play the media files according to one or more of the presorted lists without the player itself having to include logic to sort the files. Broadly, the user selects one of the presorted list of media files and the player plays the files in the specified order. In one embodiment, the media files contain audio data and the player comprises an audio CD player such as an MP3-compliant device.
    Type: Application
    Filed: December 16, 2005
    Publication date: May 18, 2006
    Inventors: Thomas Millikan, Sreenivas Kothandaraman
  • Patent number: 7042813
    Abstract: A media player permits multiple compressed media files to be concurrently stored in memory interval to the media player. By concurrently buffering more than one compressed media file at a time, any mechanical disturbance that occurs during the playing of a file or between files will not cause a cessation of audio. Further, skipping ahead or in reverse is advantageously expedited.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: May 9, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Thomas N. Millikan, Sreenivas Kothandaraman
  • Publication number: 20060095464
    Abstract: A media system is disclosed which presorts media files thereby alleviating a media player from having to actively sort the files in real time. The system creates and uses presort information with the media files. The presort information contains one or more lists of the media files previously presorted according to different sorting criteria. The presort information permits a user the ability to play the media files according to one or more of the presorted lists without the player itself having to include logic to sort the files. Broadly, the user selects one of the presorted list of media files and the player plays the files in the specified order. In one embodiment, the media files contain audio data and the player comprises an audio CD player such as an MP3-compliant device.
    Type: Application
    Filed: December 16, 2005
    Publication date: May 4, 2006
    Inventors: Thomas Millikan, Sreenivas Kothandaraman