Abstract: Techniques for selecting a runbook to recommend for remediating a detected event are disclosed. When a system detects an event, the system obtains metadata associated with the event. The metadata provides information about the event and a system topology of the system in which the event occurred. The system generates a recommendation for a runbook to remediate the event based on one or both of characteristics of the event and characteristics of the topology in which the event occurred. The system compares a system topology to system topologies associated with previously-executed runbooks. The system recommends one of the previously-executed runbooks to remediate a detected event based on determining that the topology associated with the previously-executed runbook is similar to the topology of the system in which the event occurred.

Abstract: A computer implemented approach is proposed for computationally establishing joint custodial features to augment functionality of digital data objects recorded on a distributed ledger data structure. A specialized smart contract data object used as an improved digital wallet object is persisted on the distributed ledger data structure which provides a feature interface between a cryptographic wallet controlled directly by an individual, and a set of institutional computing systems and corresponding protocols. The specialized smart contract data object is configured to be a multi-signature joint custody safe data object, the specialized smart contract data object persisted as an interactive data object on a decentralized virtual environment that is configured to automatically execute code consistently and securely across nodes of a decentralized network whose ledger forms a Turing Complete state-machine based computing environment.

Abstract: Techniques for selecting a runbook to recommend for remediating a detected event are disclosed. When a system detects an event, the system obtains metadata associated with the event. The metadata provides information about the event and a system topology of the system in which the event occurred. The system generates a recommendation for a runbook to remediate the event based on one or both of characteristics of the event and characteristics of the topology in which the event occurred. The system compares a system topology to system topologies associated with previously-executed runbooks. The system recommends one of the previously-executed runbooks to remediate a detected event based on determining that the topology associated with the previously-executed runbook is similar to the topology of the system in which the event occurred.

Abstract: Pharmaceutical compositions comprising an antidiabetic agent as an active agent are provided. The present invention relates to pharmaceutical compositions comprising linagliptin or a pharmaceutically acceptable salt thereof as an active agent. The present invention also relates to process of preparation of pharmaceutical compositions comprising linagliptin or a pharmaceutically acceptable salt thereof. The present invention also relates to method of administering the compositions comprising linagliptin to a subject in need thereof.

Abstract: The present invention relates to a pharmaceutical composition comprising lenvatinib mesylate and a stabilizer in an amount of about 10% to about 20% based on the total weight of the composition, wherein the stabilizer is selected from the group consisting of calcium hydroxide and potassium hydroxide; and its process for preparation thereof.

Abstract: The present invention relates to a pharmaceutical composition comprising lenvatinib mesylate and a stabilizer in an amount of about 10% to about 20% based on the total weight of the composition, wherein the stabilizer is selected from the group consisting of calcium hydroxide and potassium hydroxide; and its process for preparation thereof.

Abstract: Pharmaceutical compositions comprising an antidiabetic agent as an active agent are provided. The present invention relates to pharmaceutical compositions comprising linagliptin or a pharmaceutically acceptable salt thereof as an active agent. The present invention also relates to process of preparation of pharmaceutical compositions comprising linagliptin or a pharmaceutically acceptable salt thereof. The present invention also relates to method of administering the compositions comprising linagliptin to a subject in need thereof.

Abstract: Pharmaceutical compositions comprising an antidiabetic agent as an active agent are provided. The present invention relates to pharmaceutical compositions comprising linagliptin or a pharmaceutically acceptable salt thereof as an active agent. The present invention also relates to process of preparation of pharmaceutical compositions comprising linagliptin or a pharmaceutically acceptable salt thereof. The present invention also relates to method of administering the compositions comprising linagliptin to a subject in need thereof.

Abstract: According to an aspect of the present invention, the communication between processors and peripheral controllers is provided using packets. In an embodiment, the access requests are specified according to a common format such that all the information required for performing each access request is included in a single packet and sent to the peripheral controller. The peripheral controller performs the access request on the external device and generates a response. According to another aspect, the packet format enables the peripheral controller to send responses, requests originating from the external devices and interrupt requests. According to yet another aspect, the packets from processors are first stored in a random access memory (RAM) and a DMA controller retrieves the packets and delivered to the respective peripheral controllers.

Abstract: In accordance with an aspect of the present invention, a corresponding list of muxes is maintained for each combination of a peripheral and a mux option. The list is then retrieved to program the required muxes to connect the communication paths from a peripheral on the corresponding mux option, based on which the list is retrieved. In an embodiment, the information is maintained in the form of a table, with each entry storing the data corresponding to a mux and mux option. The entries are linked by appropriate pointers to form the linked list.

Abstract: According to an aspect of the present invention, the communication between processors and peripheral controllers is provided using packets. In an embodiment, the access requests are specified according to a common format such that all the information required for performing each access request is included in a single packet and sent to the peripheral controller. The peripheral controller performs the access request on the external device and generates a response. According to another aspect, the packet format enables the peripheral controller to send responses, requests originating from the external devices and interrupt requests. According to yet another aspect, the packets from processors are first stored in a random access memory (RAM) and a DMA controller retrieves the packets and delivered to the respective peripheral controllers.

Abstract: In accordance with an aspect of the present invention, a corresponding list of muxes is maintained for each combination of a peripheral and a mux option. The list is then retrieved to program the required muxes to connect the communication paths from a peripheral on the corresponding mux option, based on which the list is retrieved. In an embodiment, the information is maintained in the form of a table, with each entry storing the data corresponding to a mux and mux option. The entries are linked by appropriate pointers to form the linked list.

Abstract: A system chip has many local blocks including processor cores, caches, and memory controllers. Each local block has a local sample-select mux that is controlled by a local selection control register. The mux selects from among hundreds of internal sample nodes in the local block, and can also pass through samples output by an upstream local block. The selected samples from local blocks are sent to a central on-chip logic analyzer that compares the samples to a maskable trigger value. When the trigger value is matched, a trigger state machine advances, and samples are stored into a central capture buffer. A user debugging the chip can later read out the central capture buffer at a slower speed. Thousands of internal nodes from local blocks can be selected for sampling, triggering, and debugging. Local blocks include valid bits in 64-bit-wide samples. Only valid samples are written to the capture buffer.