Patents by Inventor Sreenivasan R. Sabapathi

Sreenivasan R. Sabapathi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5572669
    Abstract: A bus cycle signature system for testing CPU based boards comprising a data shift register and a general shift register which receive test signals from the board under test, the signals received by the shift registers being sampled by clock signals associated with bus cycle operations performed by a CPU on the board under test. The sampled signals form a board signature which can be compared with a similarly obtained signal from a known good board to detect faults in the board under test.
    Type: Grant
    Filed: May 2, 1994
    Date of Patent: November 5, 1996
    Assignee: QMax Technologies PTE. Ltd.
    Inventors: Sreenivasan R. Sabapathi, Robert S. L. Ng