Patents by Inventor Sri Harsha Choday

Sri Harsha Choday has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210142157
    Abstract: An electronic neuron device that includes a thresholding unit which utilizes current-induced spin-orbit torque (SOT). A two-step switching scheme is implemented with the device. In the first step, a charge current through heavy metal (HM) places the magnetization of a nano-magnet along the hard-axis (i.e. an unstable point for the magnet). In the second step, the device receives a current (from an electronic synapse) which moves the magnetization from the unstable point to one of the two stable states. The polarity of the net synaptic current determines the final orientation of the magnetization. A resistive crossbar array may also be provided which functions as the synapse generating a bipolar current that is a weighted sum of the inputs of the device.
    Type: Application
    Filed: August 20, 2020
    Publication date: May 13, 2021
    Applicant: Purdue Research Foundation
    Inventors: Abhronil Sengupta, Sri Harsha Choday, Yusung Kim, Kaushik Roy
  • Patent number: 10049724
    Abstract: An apparatus is provided which comprises: a first supply node to provide power supply; a column of memory cells coupled to the first supply node; a diode-connected device having a gate terminal coupled to the first supply node, and a source terminal coupled to second supply node; and a stack of devices coupled to the first supply node, wherein at least one device in the stack is coupled to the second supply node, and wherein the stack of devices is controllable according to an operation mode.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: August 14, 2018
    Assignee: Intel Corporation
    Inventors: Amit Agarwal, Steven K. Hsu, Sri Harsha Choday
  • Publication number: 20170352408
    Abstract: An apparatus is provided which comprises: a first supply node to provide power supply; a column of memory cells coupled to the first supply node; a diode-connected device having a gate terminal coupled to the first supply node, and a source terminal coupled to second supply node; and a stack of devices coupled to the first supply node, wherein at least one device in the stack is coupled to the second supply node, and wherein the stack of devices is controllable according to an operation mode.
    Type: Application
    Filed: June 7, 2016
    Publication date: December 7, 2017
    Inventors: Amit AGARWAL, Steven K. HSU, Sri Harsha CHODAY
  • Publication number: 20170330070
    Abstract: An electronic neuron device that includes a thresholding unit which utilizes current-induced spin-orbit torque (SOT). A two-step switching scheme is implemented with the device. In the first step, a charge current through heavy metal (HM) places the magnetization of a nano-magnet along the hard-axis (i.e. an unstable point for the magnet). In the second step, the device receives a current (from an electronic synapse) which moves the magnetization from the unstable point to one of the two stable states. The polarity of the net synaptic current determines the final orientation of the magnetization. A resistive crossbar array may also be provided which functions as the synapse generating a bipolar current that is a weighted sum of the inputs of the device.
    Type: Application
    Filed: February 28, 2017
    Publication date: November 16, 2017
    Applicant: Purdue Research Foundation
    Inventors: Abhronil Sengupta, Sri Harsha Choday, Yusung Kim, Kaushik Roy