Patents by Inventor Sri Ranga Sai Sai Boyapati

Sri Ranga Sai Sai Boyapati has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • DIE INTERCONNECT SUBSTRATE, AN ELECTRICAL DEVICE AND A METHOD FOR FORMING A DIE INTERCONNECT SUBSTRATE
    Publication number: 20240105621
    Abstract: A die interconnect substrate comprises a bridge die comprising at least one bridge interconnect connecting a first bridge die pad of the bridge die to a second bridge die pad of the bridge die. The die interconnect substrate comprises a multilayer substrate structure comprising a substrate interconnect. The bridge die is embedded in the multilayer substrate structure. The substrate interconnect extends from a level above the bridge die to a level below the bridge die. The multilayer substrate structure further comprises an electrically insulating layer comprising a first electrically insulating material. The multilayer substrate structure further comprises an electrically insulating filler structure located laterally between the bridge die and the electrically insulating layer, wherein the electrically insulating filler structure comprises a second electrically insulating material different from the first electrically insulating material.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 28, 2024
    Inventors: Robert Alan MAY, Kristof DARMAWIKARTA, Sri Ranga Sai Sai BOYAPATI
  • Die interconnect substrate, an electrical device and a method for forming a die interconnect substrate
    Patent number: 11901296
    Abstract: A die interconnect substrate comprises a bridge die comprising at least one bridge interconnect connecting a first bridge die pad of the bridge die to a second bridge die pad of the bridge die. The die interconnect substrate comprises a multilayer substrate structure comprising a substrate interconnect. The bridge die is embedded in the multilayer substrate structure. The substrate interconnect extends from a level above the bridge die to a level below the bridge die. The multilayer substrate structure further comprises an electrically insulating layer comprising a first electrically insulating material. The multilayer substrate structure further comprises an electrically insulating filler structure located laterally between the bridge die and the electrically insulating layer, wherein the electrically insulating filler structure comprises a second electrically insulating material different from the first electrically insulating material.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: February 13, 2024
    Assignee: Intel Corporation
    Inventors: Robert Alan May, Kristof Darmawikarta, Sri Ranga Sai Sai Boyapati
  • Die interconnect substrate, an electrical device and a method for forming a die interconnect substrate
    Patent number: 11784128
    Abstract: A die interconnect substrate comprises a bridge die comprising at least one bridge interconnect connecting a first bridge die pad of the bridge die to a second bridge die pad of the bridge die. The die interconnect substrate comprises a multilayer substrate structure comprising a substrate interconnect. The bridge die is embedded in the multilayer substrate structure. The substrate interconnect extends from a level above the bridge die to a level below the bridge die. The multilayer substrate structure further comprises an electrically insulating layer comprising a first electrically insulating material. The multilayer substrate structure further comprises an electrically insulating filler structure located laterally between the bridge die and the electrically insulating layer, wherein the electrically insulating filler structure comprises a second electrically insulating material different from the first electrically insulating material.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: October 10, 2023
    Assignee: Intel Corporation
    Inventors: Robert Alan May, Kristof Darmawikarta, Sri Ranga Sai Sai Boyapati
  • Die Interconnect Substrate, an Electrical Device and a Method for Forming a Die Interconnect Substrate
    Publication number: 20230146783
    Abstract: A die interconnect substrate comprises a bridge die comprising at least one bridge interconnect connecting a first bridge die pad of the bridge die to a second bridge die pad of the bridge die. The die interconnect substrate comprises a multilayer substrate structure comprising a substrate interconnect. The bridge die is embedded in the multilayer substrate structure. The substrate interconnect extends from a level above the bridge die to a level below the bridge die. The multilayer substrate structure further comprises an electrically insulating layer comprising a first electrically insulating material. The multilayer substrate structure further comprises an electrically insulating filler structure located laterally between the bridge die and the electrically insulating layer, wherein the electrically insulating filler structure comprises a second electrically insulating material different from the first electrically insulating material.
    Type: Application
    Filed: December 27, 2022
    Publication date: May 11, 2023
    Inventors: Robert Alan MAY, Kristof DARMAWIKARTA, Sri Ranga Sai Sai BOYAPATI
  • Die Interconnect Substrate, an Electrical Device and a Method for Forming a Die Interconnect Substrate
    Publication number: 20210320066
    Abstract: A die interconnect substrate comprises a bridge die comprising at least one bridge interconnect connecting a first bridge die pad of the bridge die to a second bridge die pad of the bridge die. The die interconnect substrate comprises a multilayer substrate structure comprising a substrate interconnect. The bridge die is embedded in the multilayer substrate structure. The substrate interconnect extends from a level above the bridge die to a level below the bridge die. The multilayer substrate structure further comprises an electrically insulating layer comprising a first electrically insulating material. The multilayer substrate structure further comprises an electrically insulating filler structure located laterally between the bridge die and the electrically insulating layer, wherein the electrically insulating filler structure comprises a second electrically insulating material different from the first electrically insulating material.
    Type: Application
    Filed: June 23, 2021
    Publication date: October 14, 2021
    Inventors: Robert Alan MAY, Kristof DARMAWIKARTA, Sri Ranga Sai Sai BOYAPATI
  • Die interconnect substrate, an electrical device and a method for forming a die interconnect substrate
    Patent number: 11069620
    Abstract: A die interconnect substrate comprises a bridge die comprising at least one bridge interconnect connecting a first bridge die pad of the bridge die to a second bridge die pad of the bridge die. The die interconnect substrate comprises a multilayer substrate structure comprising a substrate interconnect. The bridge die is embedded in the multilayer substrate structure. The substrate interconnect extends from a level above the bridge die to a level below the bridge die. The multilayer substrate structure further comprises an electrically insulating layer comprising a first electrically insulating material. The multilayer substrate structure further comprises an electrically insulating filler structure located laterally between the bridge die and the electrically insulating layer, wherein the electrically insulating filler structure comprises a second electrically insulating material different from the first electrically insulating material.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: July 20, 2021
    Assignee: Intel Corporation
    Inventors: Robert Alan May, Kristof Darmawikarta, Sri Ranga Sai Sai Boyapati
  • A Die Interconnect Substrate, an Electrical Device and a Method for Forming a Die Interconnect Substrate
    Publication number: 20210134723
    Abstract: A die interconnect substrate comprises a bridge die comprising at least one bridge interconnect connecting a first bridge die pad of the bridge die to a second bridge die pad of the bridge die. The die interconnect substrate comprises a multilayer substrate structure comprising a substrate interconnect. The bridge die is embedded in the multilayer substrate structure. The substrate interconnect extends from a level above the bridge die to a level below the bridge die. The multilayer substrate structure further comprises an electrically insulating layer comprising a first electrically insulating material. The multilayer substrate structure further comprises an electrically insulating filler structure located laterally between the bridge die and the electrically insulating layer, wherein the electrically insulating filler structure comprises a second electrically insulating material different from the first electrically insulating material.
    Type: Application
    Filed: March 31, 2017
    Publication date: May 6, 2021
    Inventors: Robert Alan MAY, Kristof DARMAWIKARTA, Sri Ranga Sai Sai BOYAPATI
  • Die interconnect substrate, an electrical device, and a method for forming a die interconnect substrate
    Patent number: 10978399
    Abstract: A die interconnect substrate comprises a bridge die comprising at least one bridge interconnect connecting a first bridge die pad of the bridge die to a second bridge die pad of the bridge die. The die interconnect substrate comprises a multilayer substrate structure comprising a substrate interconnect, wherein the bridge die is embedded in the multilayer substrate structure. The die interconnect substrate comprises a via portion formed on the first bridge die pad of the bridge die. An average angle between a surface of the first bridge die pad and a sidewall of the via portion lies between 85° and 95°.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: April 13, 2021
    Assignee: Intel Corporation
    Inventors: Kristof Darmawikarta, Robert Alan May, Sri Ranga Sai Sai Boyapati, Wei-Lun Kane Jen, Javier Soto Gonzalez
  • Die Interconnect Substrate, an Electrical Device, and a Method for Forming a Die Interconnect Substrate
    Publication number: 20200051915
    Abstract: A die interconnect substrate comprises a bridge die comprising at least one bridge interconnect connecting a first bridge die pad of the bridge die to a second bridge die pad of the bridge die. The die interconnect substrate comprises a multilayer substrate structure comprising a substrate interconnect, wherein the bridge die is embedded in the multilayer substrate structure. The die interconnect substrate comprises a via portion formed on the first bridge die pad of the bridge die. An average angle between a surface of the first bridge die pad and a sidewall of the via portion lies between 85° and 95°.
    Type: Application
    Filed: March 31, 2017
    Publication date: February 13, 2020
    Inventors: Kristof Darmawikarta, Robert Alan May, Sri Ranga Sai Sai Boyapati, Wei-Lun Kane Jen, Javier Soto Gonzalez