Patents by Inventor Sridhar Arunachalam

Sridhar Arunachalam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240322854
    Abstract: In a time division duplex (TDD) communication network, a signal conditioning device includes a first port and a second port for connection on a communications link. A downlink path is adapted for transporting downlink signals from the first port to the second port, and an uplink path is adapted for transporting uplink signals from the second port to the first port. A passive, asymmetric attenuator is adapted for attenuating a signal on the uplink path differently than the signal on the downlink path.
    Type: Application
    Filed: March 25, 2024
    Publication date: September 26, 2024
    Inventors: Sridhar Arunachalam, Janusz Pelesz, Darioush Charepoo
  • Patent number: 7474719
    Abstract: A processor capable of independently adding a specified level of noise to each different frequency-based channel signal of a composite signal, where the specified levels of noise for at least two channel signals are different. In one embodiment, the processor operates in the digital domain after the composite signal can been channelized using a single set of time-multiplexed circuitry for all channel signals.
    Type: Grant
    Filed: June 6, 2005
    Date of Patent: January 6, 2009
    Assignee: Andrew LLC
    Inventor: Sridhar Arunachalam
  • Publication number: 20060274865
    Abstract: A processor capable of independently adding a specified level of noise to each different frequency-based channel signal of a composite signal, where the specified levels of noise for at least two channel signals are different. In one embodiment, the processor operates in the digital domain after the composite signal can been channelized using a single set of time-multiplexed circuitry for all channel signals.
    Type: Application
    Filed: June 6, 2005
    Publication date: December 7, 2006
    Applicant: Andrew Corporation, a Delaware corporation
    Inventor: Sridhar Arunachalam
  • Patent number: 7023273
    Abstract: A predistorter including a modulator configured for use with an RF power amplifier or in an amplifier system that combines in a data structure correction factors for amplitude and phase non-linearities in the responses of the amplifier and the modulator. Correction factors for memory effects in the response of the RF power amplifier may also be calculated within the data structure from scale factors transferred into the data structure. Such a calculation may be based on a scaled polynomial. A circuit for applying the difference equation to the correction factors may also be included.
    Type: Grant
    Filed: October 6, 2003
    Date of Patent: April 4, 2006
    Assignee: Andrew Corporation
    Inventors: Robert Everest Johnson, Sridhar Arunachalam
  • Publication number: 20050073360
    Abstract: A predistorter including a modulator configured for use with an RF power amplifier or in an amplifier system that combines in a data structure correction factors for amplitude and phase non-linearities in the responses of the amplifier and the modulator. Correction factors for memory effects in the response of the RF power amplifier may also be calculated within the data structure from scale factors transferred into the data structure. Such a calculation may be based on a scaled polynomial. A circuit for applying the difference equation to the correction factors may also be included.
    Type: Application
    Filed: October 6, 2003
    Publication date: April 7, 2005
    Applicant: Andrew Corporation
    Inventors: Robert Johnson, Sridhar Arunachalam
  • Patent number: 6496546
    Abstract: A technique for receiving and transmitting wireless telecommunications through use of a generic architecture is disclosed. The present invention mitigates the complexity of different transceiver operations by allowing a generic architecture to be used in a variety of situations with different channels and different telecommunications standards. An illustrative embodiment of the present invention comprises: receiving uplink analog RF signals at a base station; converting the uplink analog wide-band RF signals into IF uplink digital signals at an analog-to-digital converter; converting the IF uplink digital signals into a number of uplink channels; and demodulating selected narrow-band uplink channels from the total number of narrow-band uplink channels.
    Type: Grant
    Filed: July 15, 1998
    Date of Patent: December 17, 2002
    Assignee: Lucent Technologies Inc.
    Inventors: Stephen Alan Allpress, Sridhar Arunachalam, Reza Mardani, Carmine James Pagano, II, Joseph Anthony Tarallo, Tiejun Shan
  • Patent number: 6411653
    Abstract: A technique for reducing computational and storage requirements of cascaded polyphase DFT-filter bank for receiving and transmitting telecommunications is disclosed. The cascaded polyphase DFT-filter bank is designed by specifically selecting a range of radio spectrum for reducing computational and storage requirements of the cascaded polyphase DFT-filter bank operation.
    Type: Grant
    Filed: July 16, 1999
    Date of Patent: June 25, 2002
    Assignee: Lucent Technologies Inc.
    Inventors: Sridhar Arunachalam, Reza Mardani