Abstract: A power converter system includes a first transformer winding. A switch is operatively connected between the first transformer winding and ground for controlling the first transformer winding. A holdup charging circuit includes a clamp circuit connected between a first node on a first side of the first transformer winding and a second node on a second side of the first transformer winding. The clamp circuit includes a clamp diode oriented to let current flow through the clamp circuit in a direction from the first node to the second node. The clamp circuit includes a clamp capacitor in series between the clamp diode and the second node. A holdup circuit, including a holdup capacitor, is connected to a third node in the clamp circuit between the clamp diode and the clamp capacitor.

Abstract: A set of threads of an application are identified to be executed on a platform, where the platform comprises a multi-node architecture. A set of queues of an I/O device of the platform are reserved and associated with one of a plurality of nodes in the multi-node architecture. Data is received at the I/O device, where the I/O device is included in a particular one of the plurality of nodes. Response data is generated through execution of a thread in the set of threads using a processing core and memory of the particular node, and the response data is caused to be sent on the I/O device based on inclusion of the I/O device in the particular node.

Abstract: A power converter system includes a first transformer winding. Two switches are operatively connected to the first power winding and ground for controlling the first transformer winding. A holdup charging circuit includes a clamp circuit connected between a first node on a first side of the first transformer winding and a second node on a second side of the first transformer winding. The clamp circuit includes a clamp diode oriented to let current flow through the clamp circuit in a direction from the first node to the second node. The clamp circuit includes a clamp capacitor in series between the clamp diode and the second node. A holdup circuit, including a holdup capacitor, is connected to a third node in the clamp circuit between the clamp diode and the clamp capacitor.

Abstract: The present invention relates to the use of adenosine receptor modulators to affect the circadian rhythm, in particular, to the use of such modulators for the treatment of circadian rhythm disorders. In particular, the invention relates to a composition comprising at least one selective adenosine receptor modulator, wherein said composition modulates two or three, but not all of adenosine receptor subtypes A1, A2A, A2B and/or A3 for use in the treatment of circadian rhythm disorders or for modulating a biological clock.

Abstract: The present invention relates to the use of adenosine receptor modulators to affect the circadian rhythm, in particular, to the use of such modulators for the treatment of circadian rhythm disorders. In particular, the invention relates to a composition comprising at least one selective adenosine receptor modulator, wherein said composition modulates two or three, but not all of adenosine receptor subtypes A1, A2A, A2B and/or A3 for use in the treatment of circadian rhythm disorders or for modulating a biological clock.

Abstract: The present invention relates to the use of adenosine receptor modulators to affect the circadian rhythm, in particular, to the use of such modulators for the treatment of circadian rhythm disorders. In particular, the invention relates to a composition comprising at least one selective adenosine receptor modulator, wherein said composition modulates two or three, but not all of adenosine receptor subtypes A1, A2A, A2B and/or A3 for use in the treatment of circadian rhythm disorders or for modulating a biological clock.