Patents by Inventor Srihari Adireddy

Srihari Adireddy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8995940
    Abstract: A technique includes receiving data that is communicated in a frame over a wireless network and processing the data through a filter. A response of the filter is changed during the processing.
    Type: Grant
    Filed: September 27, 2006
    Date of Patent: March 31, 2015
    Assignee: Silicon Laboratories Inc.
    Inventors: Srihari Adireddy, Brian D. Green
  • Patent number: 8184683
    Abstract: In one embodiment, the present invention includes a transceiver coupled to a baseband processor to receive digital control information that includes both event and schedule information, and which stores the digital control information in a storage of the transceiver. The transceiver may then be operated according to the event and schedule information.
    Type: Grant
    Filed: February 15, 2011
    Date of Patent: May 22, 2012
    Assignee: Silicon Laboratories Inc.
    Inventors: Brian D. Green, Srihari Adireddy, Lysander Lim, Ramkishore Ganti
  • Patent number: 8150358
    Abstract: A method is disclosed for performing dual mode image rejection calibration in a receiver. A first image correction factor is acquired using a first known signal associated with a first signal band during a startup mode. The first image correction factor has a plurality of bits including most significant bits (MSBs) and least significant bits (LSBs). The LSBs of the first image correction factor are adjusted incrementally during a normal operation mode. A radio frequency (RF) signal associated with the first signal band is received using the first image correction factor during the normal operation mode.
    Type: Grant
    Filed: February 17, 2010
    Date of Patent: April 3, 2012
    Assignee: Silicon Laboratories Inc.
    Inventors: Tod Paulus, Donald A. Kerth, Srihari Adireddy, G. Diwakar Vishakadatta
  • Publication number: 20110134974
    Abstract: In one embodiment, the present invention includes a transceiver coupled to a baseband processor to receive digital control information that includes both event and schedule information, and which stores the digital control information in a storage of the transceiver. The transceiver may then be operated according to the event and schedule information.
    Type: Application
    Filed: February 15, 2011
    Publication date: June 9, 2011
    Inventors: Brian D. Green, Srihari Adireddy, Lysander Lim, Ramkishore Ganti
  • Patent number: 7907657
    Abstract: In one embodiment, the present invention includes a transceiver coupled to a baseband processor to receive digital control information that includes both event and schedule information, and which stores the digital control information in a storage of the transceiver. The transceiver may then be operated according to the event and schedule information.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: March 15, 2011
    Assignee: Silicon Laboratories Inc.
    Inventors: Brian D. Green, Srihari Adireddy, Lysander Lim, Ramkishore Ganti
  • Publication number: 20100246995
    Abstract: A method is disclosed for performing dual mode image rejection calibration in a receiver. A first image correction factor is acquired using a first known signal associated with a first signal band during a startup mode. The first image correction factor has a plurality of bits including most significant bits (MSBs) and least significant bits (LSBs). The LSBs of the first image correction factor are adjusted incrementally during a normal operation mode. A radio frequency (RF) signal associated with the first signal band is received using the first image correction factor during the normal operation mode.
    Type: Application
    Filed: February 17, 2010
    Publication date: September 30, 2010
    Applicant: SILICON LABORATORIES, INC.
    Inventors: Tod Paulus, Donald A. Kerth, Srihari Adireddy, G. Diwakar Vishakhadatta
  • Patent number: 7676210
    Abstract: A method is disclosed for performing dual mode image rejection calibration in a receiver. A first image correction factor is acquired for use in a receiver system using a first known signal associated with a first signal band during a startup mode. The first image correction factor is adjusted incrementally during a normal operation mode. A radio frequency (RF) signal associated with the first signal band is received using the first image correction factor during the normal operation mode.
    Type: Grant
    Filed: September 15, 2005
    Date of Patent: March 9, 2010
    Inventors: Tod Paulus, Donald A. Kerth, Srihari Adireddy, G. Diwakar Vishakhadatta
  • Patent number: 7583946
    Abstract: A wireless communication receiver is disclosed that operates in a test mode to determine image correction information that is used to suppress undesired image signals when the receiver switches to a normal operational mode. In one embodiment, the receiver includes a frequency synthesizer coupled by a quadrature divider to an in-phase (I) mixer and a quadrature mixer. The mixers are coupled by respective analog to digital converters (ADCs) to respective I and Q channel inputs of a digital signal processor (DSP). In the test mode, a test tone is provided to the mixer inputs. The test tone is divided down further and provided to clock the frequency synthesizer, the ADCs and the DSP. This configuration locks together the mixers, frequency synthesizer, ADCs and DSP ratiometrically in frequency during the test mode while image correction information is being determined.
    Type: Grant
    Filed: January 27, 2006
    Date of Patent: September 1, 2009
    Assignee: Silicon Laboratories, Inc.
    Inventors: Donald A. Kerth, Srihari Adireddy, Brian Douglas Green, Tod Paulus, Scott D. Willingham
  • Patent number: 7583937
    Abstract: In one embodiment, the present invention includes a method for receiving at a transceiver from a baseband processor digital control information that includes both event and schedule information, storing the digital control information in a storage of the transceiver, and operating the transceiver according to the event and schedule information.
    Type: Grant
    Filed: December 13, 2005
    Date of Patent: September 1, 2009
    Assignee: Silicon Laboratories Inc.
    Inventors: Brian D. Green, Srihari Adireddy, Lysander Lim, Ramkishore Ganti
  • Patent number: 7428265
    Abstract: A network includes a transmitter for transmitting a stream of known symbols and unknown symbols in an optimal distribution through a transmission channel to a receiver that receives the transmitted stream of known symbols and unknown symbols distorted by intersymbol interference (ISI). The receiver uses a known symbol generator and a precursor cancellation decision feedback equalizer (PC-DFE) to cancel precursor ISI from symbols that have not yet been decided. The transmitter comprises a known symbol distribution controller for inserting a plurality of known symbols into an outgoing stream of unknown symbols in an optimum distribution in order to improve the performance of the PC-DFE in the receiver.
    Type: Grant
    Filed: July 27, 2000
    Date of Patent: September 23, 2008
    Assignee: Cornell Research Foundation
    Inventors: Srihari Adireddy, Lang Tong
  • Publication number: 20080076365
    Abstract: A technique includes receiving data that is communicated in a frame over a wireless network and processing the data through a filter. A response of the filter is changed during the processing.
    Type: Application
    Filed: September 27, 2006
    Publication date: March 27, 2008
    Inventors: Srihari Adireddy, Brian D. Green
  • Publication number: 20060245483
    Abstract: In one embodiment, the present invention includes a transceiver coupled to a baseband processor to receive digital control information that includes both event and schedule information, and which stores the digital control information in a storage of the transceiver. The transceiver may then be operated according to the event and schedule information.
    Type: Application
    Filed: June 30, 2006
    Publication date: November 2, 2006
    Inventors: Brian Green, Srihari Adireddy, Lysander Lim, Ramkishore Ganti
  • Publication number: 20060239337
    Abstract: In one embodiment, the present invention includes a method for receiving at a transceiver from a baseband processor digital control information that includes both event and schedule information, storing the digital control information in a storage of the transceiver, and operating the transceiver according to the event and schedule information.
    Type: Application
    Filed: December 13, 2005
    Publication date: October 26, 2006
    Inventors: Brian Green, Srihari Adireddy, Lysander Lim, Ramkishore Ganti
  • Patent number: 7079586
    Abstract: There is disclosed a transmitter for transmitting a stream of known symbols and unknown symbols through a transmission channel to a first receiver that receives the transmitted stream of known symbols and unknown symbols distorted by intersymbol interference (ISI) and reduces therein an ISI signal. The transmitter comprises a known symbol distribution controller capable of inserting a plurality of known symbol clusters into an outgoing stream of unknown symbols in an optimum distribution in order to improve the performance of the first receiver.
    Type: Grant
    Filed: July 27, 2000
    Date of Patent: July 18, 2006
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Srihari Adireddy, Lang Tong
  • Publication number: 20060128338
    Abstract: A wireless communication receiver is disclosed that operates in a test mode to determine image correction information that is used to suppress undesired image signals when the receiver switches to a normal operational mode. In one embodiment, the receiver includes a frequency synthesizer coupled by a quadrature divider to an in-phase (I) mixer and a quadrature mixer. The mixers are coupled by respective analog to digital converters (ADCs) to respective I and Q channel inputs of a digital signal processor (DSP). In the test mode, a test tone is provided to the mixer inputs. The test tone is divided down further and provided to clock the frequency synthesizer, the ADCs and the DSP. This configuration locks together the mixers, frequency synthesizer, ADCs and DSP ratiometrically in frequency during the test mode while image correction information is being determined.
    Type: Application
    Filed: January 27, 2006
    Publication date: June 15, 2006
    Applicant: Silicon Laboratories Inc.
    Inventors: Donald Kerth, Srihari Adireddy, Brian Green, Todd Paulus, Scott Willlingham
  • Publication number: 20060111072
    Abstract: A wireless communication receiver is disclosed that operates in a test mode to determine image correction information that is used to suppress undesired image signals when the receiver switches to a normal operational mode. In one embodiment, the receiver includes a frequency synthesizer coupled by a quadrature divider to an in-phase (I) mixer and a quadrature mixer. The mixers are coupled by respective analog to digital converters (ADCs) to respective I and Q channel inputs of a digital signal processor (DSP). In the test mode, a test tone is provided to the mixer inputs. The test tone is divided down further and provided to clock the frequency synthesizer, the ADCs and the DSP. This configuration locks together the mixers, frequency synthesizer, ADCs and DSP ratiometrically in frequency during the test mode while image correction information is being determined.
    Type: Application
    Filed: October 31, 2005
    Publication date: May 25, 2006
    Applicant: Silicon Laboratories Inc.
    Inventors: Donald Kerth, Srihari Adireddy, Brian Green, Tod Paulus, Scott Willlingham
  • Publication number: 20060111071
    Abstract: A method is disclosed for performing dual mode image rejection calibration in a receiver. A first image correction factor is acquired (1302) for use in a receiver system (15) using a first known signal associated with a first signal band during a startup mode. The first image correction factor is adjusted incrementally (1310) during a normal operation mode. A radio frequency (RF) signal associated with the first signal band is received (1324) using the first image correction factor during the normal operation mode.
    Type: Application
    Filed: September 15, 2005
    Publication date: May 25, 2006
    Applicant: SILICON LABORATORIES, INC.
    Inventors: Tod Paulus, Donald Kerth, Srihari Adireddy, G. Vishakhadatta
  • Patent number: 6912250
    Abstract: There is disclosed, for use in a receiver receiving from a transmission channel an incoming stream of known symbols and unknown symbols distorted by intersymbol interference (ISI), an apparatus for reducing a precursor ISI signal. The apparatus for reducing the precursor ISI signal comprises: 1) a decision feedback equalizer for receiving the incoming stream of distorted known symbols and distorted unknown symbols and generating a sequence of detected symbols; and 2) a known symbol generator for generating a copy of a first known symbol prior to an estimation of the first known symbol by the decision feedback equalizer, wherein the decision feedback equalizer uses the copy of the first known symbol to reduce a first precursor ISI signal in a second symbol transmitted prior to the first known symbol.
    Type: Grant
    Filed: July 27, 2000
    Date of Patent: June 28, 2005
    Assignee: Cornell Research Foundation Inc.
    Inventors: Srihari Adireddy, Lang Tong
  • Patent number: 6754294
    Abstract: An apparatus for reducing a precursor ISI signal in a receiver that receives an incoming stream of symbols distorted by intersymbol interference (ISI) includes: 1) a first forward filter for receiving the incoming stream of distorted symbols and generating a first equalized output signal (Y′k); 2) a first decision feedback equalizer (DFE) stage for receiving the Y′k signal and generating a first decided symbol sequence (Ŝk−d), wherein the first DFE stage generates from Ŝk−d a first postcursor cancellation signal that reduces postcursor ISI in the Y′k signal and generates from the Y′k signal a first symbol estimate signal (vk) in which postcursor ISI is at least partially reduced; and 3) a second decision feedback equalizer (DFE) stage for receiving the Y′k signal and generating a second decided symbol sequence (Ŝk−2d), wherein the second DFE stage comprises a soft symbol estimator that receives the vk signal and generates a soft decision sequen
    Type: Grant
    Filed: July 27, 2000
    Date of Patent: June 22, 2004
    Assignee: Cornell Research Foundation, Inc.
    Inventors: Srihari Adireddy, Lang Tong