Patents by Inventor Srihari Babu Alla

Srihari Babu Alla has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12008677
    Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for compatible compression for different types of image views. A graphics processor may select a first common format of a plurality of common formats for at least one image based on at least one of application data or first metadata associated with the at least one image. The graphics processor may encode the at least one image based on the selected first common format for the at least one image. The graphics processor may select a second common format for the at least one image based on second metadata of the at least one image. The second common format may be identical to the first common format. The graphics processor may decode the at least one image based on the selected second common format for the at least one image.
    Type: Grant
    Filed: March 17, 2022
    Date of Patent: June 11, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Srihari Babu Alla, Tao Wang, Andrew Evan Gruber, Matthew Netsch, Richard Hammerstone, Thomas Edwin Frisinger
  • Patent number: 11978151
    Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may obtain an indication of a BVH structure including a plurality of nodes, wherein the BVH structure is associated with geometry data for a plurality of primitives in a scene, wherein each of the plurality of nodes is associated with one or more primitives, where a first level BVH includes a set of first nodes and a second level BVH includes a set of second nodes. The apparatus may also allocate information for a plurality of second nodes in the set of second nodes to at least one first node in the set of first nodes. Further, the apparatus may store the allocated information for the plurality of second nodes in the set of second nodes in the at least one first node in the set of first nodes.
    Type: Grant
    Filed: August 31, 2022
    Date of Patent: May 7, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Adimulam Ramesh Babu, Srihari Babu Alla, Avinash Seetharamaiah, Jonnala Gadda Nagendra Kumar
  • Publication number: 20240070964
    Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may obtain an indication of a BVH structure including a plurality of nodes, wherein the BVH structure is associated with geometry data for a plurality of primitives in a scene, wherein each of the plurality of nodes is associated with one or more primitives, where a first level BVH includes a set of first nodes and a second level BVH includes a set of second nodes. The apparatus may also allocate information for a plurality of second nodes in the set of second nodes to at least one first node in the set of first nodes. Further, the apparatus may store the allocated information for the plurality of second nodes in the set of second nodes in the at least one first node in the set of first nodes.
    Type: Application
    Filed: August 31, 2022
    Publication date: February 29, 2024
    Inventors: Adimulam RAMESH BABU, Srihari Babu ALLA, Avinash SEETHARAMAIAH, Jonnala Gadda NAGENDRA KUMAR
  • Patent number: 11893677
    Abstract: Systems and techniques are provided for widening a hierarchical structure for ray tracing. For instance, a process can include obtaining a plurality of primitives of a scene object included in a first hierarchical acceleration data structure and determining one or more candidate hierarchical acceleration data structures each including the plurality of primitives. A cost metric can be determined for the one or more candidate hierarchical acceleration data structures and, based on the cost metric, a compressibility prediction associated with a candidate hierarchical acceleration data structure of the one or more candidate hierarchical acceleration data structures can be determined. An output hierarchical acceleration data structure can be generated based on the compressibility prediction.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: February 6, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Adimulam Ramesh Babu, Srihari Babu Alla, Avinash Seetharamaiah, Jonnala Gadda Nagendra Kumar, David Kirk McAllister
  • Publication number: 20240037840
    Abstract: Systems and techniques are provided for widening a hierarchical structure for ray tracing. For instance, a process can include obtaining a plurality of primitives of a scene object included in a first hierarchical acceleration data structure and determining one or more candidate hierarchical acceleration data structures each including the plurality of primitives. A cost metric can be determined for the one or more candidate hierarchical acceleration data structures and, based on the cost metric, a compressibility prediction associated with a candidate hierarchical acceleration data structure of the one or more candidate hierarchical acceleration data structures can be determined. An output hierarchical acceleration data structure can be generated based on the compressibility prediction.
    Type: Application
    Filed: July 29, 2022
    Publication date: February 1, 2024
    Inventors: Adimulam RAMESH BABU, Srihari Babu ALLA, Avinash SEETHARAMAIAH, Jonnala Gadda NAGENDRA KUMAR, David Kirk MCALLISTER
  • Publication number: 20230343016
    Abstract: The present disclosure relates to graphics processing. An apparatus of the present disclosure may determine visibility streams corresponding to a target and a set of bins into which the target is divided. The apparatus may select one of a first rendering mode or a second rendering mode for the target based on the first visibility stream and based on the set of second visibility streams. When the first rendering mode is select, the apparatus may configure each of the set of bins into a first subset associated with a first type of rendering pass or a second subset associated with a second type of rendering pass. The apparatus may then render the target based on the selected one of the first rendering mode or the second rendering mode and, if applicable, based on the first rendering pass type or the second rendering pass type.
    Type: Application
    Filed: November 18, 2020
    Publication date: October 26, 2023
    Inventors: Srihari Babu ALLA, Jonnala Gadda NAGENDRA KUMAR, Avinash SEETHARAMAIAH, Andrew Evan GRUBER, Thomas Edwin FRISINGER, Richard HAMMERSTONE, Bo DU, Yongjun XU
  • Publication number: 20230298123
    Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for compatible compression for different types of image views. A graphics processor may select a first common format of a plurality of common formats for at least one image based on at least one of application data or first metadata associated with the at least one image. The graphics processor may encode the at least one image based on the selected first common format for the at least one image. The graphics processor may select a second common format for the at least one image based on second metadata of the at least one image. The second common format may be identical to the first common format. The graphics processor may decode the at least one image based on the selected second common format for the at least one image.
    Type: Application
    Filed: March 17, 2022
    Publication date: September 21, 2023
    Inventors: Srihari Babu ALLA, Tao WANG, Andrew Evan GRUBER, Matthew NETSCH, Richard HAMMERSTONE, Thomas Edwin FRISINGER
  • Patent number: 11727631
    Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may perform a color analysis on at least one first frame of a plurality of frames, the color analysis being performed based on at least one image in the at least one first frame. The apparatus may also generate a frequency map for at least one second frame of the plurality of frames based on the performed color analysis. Further, the apparatus may render the at least one second frame based on the frequency map for the at least one second frame, the at least one second frame being rendered after the at least one first frame.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: August 15, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Matthew Netsch, Srihari Babu Alla, Avinash Seetharamaiah, Jonnala Gadda Nagendra Kumar
  • Publication number: 20230252685
    Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU or CPU. The apparatus may allocate each of a plurality of primitives in a scene into one of a plurality of bounding boxes, each of the plurality of bounding boxes corresponding to a plurality of nodes including internal nodes and leaf nodes. The apparatus may also identify whether each of the plurality of nodes is one of the internal nodes or one of the leaf nodes. Further, the apparatus may estimate a compressibility of each of the plurality of nodes if the node is one of the leaf nodes, the compressibility of the node corresponding to whether the node is compressible. The apparatus may also compress data corresponding to each of the plurality of nodes if the node is estimated to be compressible.
    Type: Application
    Filed: February 4, 2022
    Publication date: August 10, 2023
    Inventors: Adimulam RAMESH BABU, Srihari Babu ALLA, David Kirk MCALLISTER
  • Patent number: 11682109
    Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for configurable aprons for expanded binning. Aspects of the present disclosure include identifying one or more pixel tiles in at least one bin and determining edge information for each pixel tile of the one or more pixel tiles. The edge information may be associated with one or more pixels adjacent to each pixel tile. The present disclosure further describes determining whether at least one adjacent bin is visible based on the edge information for each pixel tile, where the at least one adjacent bin may be adjacent to the at least one bin.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: June 20, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Kalyan Kumar Bhiravabhatla, Krishnaiah Gummidipudi, Ankit Kumar Singh, Andrew Evan Gruber, Pavan Kumar Akkaraju, Srihari Babu Alla, Jonnala Gadda Nagendra Kumar, Vishwanath Shashikant Nikam
  • Publication number: 20230086288
    Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may perform a color analysis on at least one first frame of a plurality of frames, the color analysis being performed based on at least one image in the at least one first frame. The apparatus may also generate a frequency map for at least one second frame of the plurality of frames based on the performed color analysis. Further, the apparatus may render the at least one second frame based on the frequency map for the at least one second frame, the at least one second frame being rendered after the at least one first frame.
    Type: Application
    Filed: September 22, 2021
    Publication date: March 23, 2023
    Inventors: Matthew NETSCH, Srihari Babu ALLA, Avinash SEETHARAMAIAH, Jonnala Gadda NAGENDRA KUMAR
  • Patent number: 11600002
    Abstract: Methods, systems, and devices for graphics processing are described. A device may receive an image including a set of pixels. The device may render a first subset of pixels in each bin of a set of bins during a first rendering pass, and defer rendering a second subset of pixels and a third subset of pixels in each bin of the set of bins during the first rendering pass. The second subset of pixels may include edge pixels and the third subset of pixels may be between the first subset of pixels and the second subset of pixels. The device may render the second subset of pixels and the third subset of pixels in each bin of the set of bins during a second rendering pass based on rendering the first subset of pixels. The device may then output the image based on the first and second rendering pass.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: March 7, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Jian Liang, Andrew Evan Gruber, Tao Wang, Srihari Babu Alla, Kalyan Kumar Bhiravabhatla, Jonnala Gadda Nagendra Kumar, William Licea-Kane, Fredrick Alan Hickman
  • Patent number: 11593990
    Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may configure a BVH structure including a plurality of levels and a plurality of nodes, the BVH structure being associated with geometry data for a plurality of primitives in a scene. The apparatus may also identify an amount of storage in a GMEM that is available for storing at least some of the plurality of nodes in the BVH structure. Further, the apparatus may allocate the BVH structure into a first BVH section including a plurality of first nodes and a second BVH section including a plurality of second nodes. The apparatus may also store first data associated with the plurality of first nodes in the GMEM and second data associated with the plurality of first nodes and the plurality of second nodes in a system memory.
    Type: Grant
    Filed: February 4, 2022
    Date of Patent: February 28, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Adimulam Ramesh Babu, Srihari Babu Alla, David Kirk McAllister
  • Patent number: 11373268
    Abstract: The present disclosure relates to methods and apparatus for hybrid rendering of video/graphics content by a graphics processing unit. The apparatus can configure the graphics processing unit of a display apparatus to perform multiple rendering passes for a frame of a scene to be displayed on a display device. Moreover, the apparatus can control the graphics processing unit to perform a first rendering pass of the multiple rendering passes to generate a first render target that is stored in either an on-chip graphics memory of the GPU or a system of the display apparatus. The apparatus can also control the graphics processing unit to perform a second rendering pass to generate a second render target that is alternatively stored in the system memory of the display apparatus or on-chip graphics memory of the GPU.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: June 28, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Srihari Babu Alla, Jonnala Gadda Nagendra Kumar, Avinash Seetharamaiah, Andrew Evan Gruber, Richard Hammerstone, Thomas Edwin Frisinger, Daniel Archard
  • Patent number: 11321804
    Abstract: Methods, systems, and devices for graphics processer unit (GPU) operations are described. A device may monitor one or more states of a GPU during a duration. Based on monitoring the one or more GPU states, the device may determine an execution of a GPU command that is common to at least two GPU operations for clearing the GPU buffer. The device may determine whether the GPU clear command has previously been executed during a duration or a GPU cycle in which the device monitored the GPU states. The device may process the GPU clear command based on the determination of whether the GPU clear command has previously been executed. For example, the device may drop the GPU clear command based on the determination or modify a portion of the GPU clear command and execute at least the modified portion of the GPU clear command.
    Type: Grant
    Filed: October 15, 2020
    Date of Patent: May 3, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Thomas Edwin Frisinger, Richard Hammerstone, Jonnala Gadda Nagendra Kumar, Avinash Seetharamaiah, Shangmei Yu, Srihari Babu Alla
  • Publication number: 20220122214
    Abstract: Methods, systems, and devices for graphics processer unit (GPU) operations are described. A device may monitor one or more states of a GPU during a duration. Based on monitoring the one or more GPU states, the device may determine an execution of a GPU command that is common to at least two GPU operations for clearing the GPU buffer. The device may determine whether the GPU clear command has previously been executed during a duration or a GPU cycle in which the device monitored the GPU states. The device may process the GPU clear command based on the determination of whether the GPU clear command has previously been executed. For example, the device may drop the GPU clear command based on the determination or modify a portion of the GPU clear command and execute at least the modified portion of the GPU clear command.
    Type: Application
    Filed: October 15, 2020
    Publication date: April 21, 2022
    Inventors: Thomas Edwin Frisinger, Richard Hammerstone, Jonnala Gadda Nagendra Kumar, Avinash Seetharamaiah, Shangmei Yu, Srihari Babu Alla
  • Publication number: 20220122238
    Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for configurable aprons for expanded binning. Aspects of the present disclosure include identifying one or more pixel tiles in at least one bin and determining edge information for each pixel tile of the one or more pixel tiles. The edge information may be associated with one or more pixels adjacent to each pixel tile. The present disclosure further describes determining whether at least one adjacent bin is visible based on the edge information for each pixel tile, where the at least one adjacent bin may be adjacent to the at least one bin.
    Type: Application
    Filed: October 16, 2020
    Publication date: April 21, 2022
    Inventors: Kalyan Kumar BHIRAVABHATLA, Krishnaiah GUMMIDIPUDI, Ankit Kumar SINGH, Andrew Evan GRUBER, Pavan Kumar AKKARAJU, Srihari Babu ALLA, Jonnala Gadda NAGENDRA KUMAR, Vishwanath Shashikant NIKAM
  • Publication number: 20220101479
    Abstract: The present disclosure relates to methods and apparatus for hybrid rendering of video/graphics content by a graphics processing unit. The apparatus can configure the graphics processing unit of a display apparatus to perform multiple rendering passes for a frame of a scene to be displayed on a display device. Moreover, the apparatus can control the graphics processing unit to perform a first rendering pass of the multiple rendering passes to generate a first render target that is stored in either an on-chip graphics memory of the GPU or a system of the display apparatus. The apparatus can also control the graphics processing unit to perform a second rendering pass to generate a second render target that is alternatively stored in the system memory of the display apparatus or on-chip graphics memory of the GPU.
    Type: Application
    Filed: September 30, 2020
    Publication date: March 31, 2022
    Inventors: Srihari Babu ALLA, Jonnala Gadda NAGENDRA KUMAR, Avinash SEETHARAMAIAH, Andrew Evan GRUBER, Richard HAMMERSTONE, Thomas Edwin FRISINGER, Daniel ARCHARD
  • Publication number: 20210383545
    Abstract: Methods, systems, and devices for graphics processing are described. A device may receive an image including a set of pixels. The device may render a first subset of pixels in each bin of a set of bins during a first rendering pass, and defer rendering a second subset of pixels and a third subset of pixels in each bin of the set of bins during the first rendering pass. The second subset of pixels may include edge pixels and the third subset of pixels may be between the first subset of pixels and the second subset of pixels. The device may render the second subset of pixels and the third subset of pixels in each bin of the set of bins during a second rendering pass based on rendering the first subset of pixels. The device may then output the image based on the first and second rendering pass.
    Type: Application
    Filed: June 3, 2020
    Publication date: December 9, 2021
    Inventors: Jian Liang, Andrew Evan Gruber, Tao Wang, Srihari Babu Alla, Kalyan Kumar Bhiravabhatla, Jonnala Gadda Nagendra Kumar, William Licea-Kane, Fredrick Alan Hickman
  • Patent number: 11176734
    Abstract: The present disclosure relates to methods and apparatus for graphics processing. An example method generally includes receiving, at a graphics processing unit (GPU), a plurality of commands corresponding to a plurality of draws across a frame, each of the plurality of commands indicating a depth test direction with respect to a low-resolution depth (LRZ) buffer for the corresponding draw. The method generally includes maintaining, at the GPU, a LRZ status buffer to store a corresponding depth test direction for a first command in time of the plurality of commands processed by the GPU. The method generally includes disabling, at the GPU, use of the LRZ buffer for depth testing for any of the plurality of commands remaining unprocessed after processing a command of the plurality of commands having a different depth test direction than the corresponding depth test direction stored in the LRZ status buffer.
    Type: Grant
    Filed: October 6, 2020
    Date of Patent: November 16, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Srihari Babu Alla, Adimulam Ramesh Babu, Jonnala Gadda Nagendra Kumar, Avinash Seetharamaiah, Tao Wang, Xuefeng Tang, Thomas Edwin Frisinger, Andrew Evan Gruber