Patents by Inventor Srilekha Bhat

Srilekha Bhat has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12119930
    Abstract: The disclosure relates to bit-interleaved coded modulation with iterative decoding. In some implementations, a receiver comprises: a first memory including multiple first sub-memories; a decoder configured to perform first operations comprising: calculating, first extrinsic information of multiple code bits associated with multiple received symbols; and a demapper configured to perform second operations comprising: calculating soft decision information of the code bits; calculating, based on the soft decision information and the first extrinsic information, second extrinsic information of the code bits; and writing the second extrinsic information of the code bits into the first memory such that, for each received symbol, each sub-memory of the first sub-memories respectively stores the second extrinsic information associated with a respective one of the code bits corresponding to the received symbol.
    Type: Grant
    Filed: October 31, 2022
    Date of Patent: October 15, 2024
    Assignee: HUGHES NETWORK SYSTEMS, LLC
    Inventors: Srilekha Bhat, Yanlai Liu, Bala Subramaniam, Liping Chen, Mustafa Eroz
  • Publication number: 20240146451
    Abstract: The disclosure relates to bit-interleaved coded modulation with iterative decoding. In some implementations, a receiver comprises: a first memory including multiple first sub-memories; a decoder configured to perform first operations comprising: calculating, first extrinsic information of multiple code bits associated with multiple received symbols; and a demapper configured to perform second operations comprising: calculating soft decision information of the code bits; calculating, based on the soft decision information and the first extrinsic information, second extrinsic information of the code bits; and writing the second extrinsic information of the code bits into the first memory such that, for each received symbol, each sub-memory of the first sub-memories respectively stores the second extrinsic information associated with a respective one of the code bits corresponding to the received symbol.
    Type: Application
    Filed: October 31, 2022
    Publication date: May 2, 2024
    Inventors: Srilekha Bhat, Yanlai Liu, Bala Subramaniam, Liping Chen, Mustafa Eroz