Patents by Inventor Srini Doddi
Srini Doddi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 8358828Abstract: A method, system, and computer program product for preprocessing a pattern in a library of patterns and querying a preprocessed library of patterns are disclosed. Embodiments for querying a preprocessed library of patterns are disclosed for determining a distance between the representation for the first pattern and the representation for the second pattern, determining whether the distance between the representation for the first pattern and the representation for the second pattern is within the range for the first pattern, and transforming the second pattern with the transformation matrix to provide information about the second pattern.Type: GrantFiled: December 28, 2007Date of Patent: January 22, 2013Assignee: Cadence Design Systems, Inc.Inventors: Srini Doddi, Junjiang Lei, Kuang-Hao Lay, Weiping Fang
-
Patent number: 8341571Abstract: A method, system, and computer program product are disclosed for generating a pattern signature to represent a pattern in an integrated circuit design. In one approach, the method, system and computer program product transform pattern data, two dimensional data for the pattern, into a set of one dimensional mathematical functions, compress the set of one dimensional mathematical functions into a single variable function, compress the single variable function by calculating a set of values for the single variable function, and generate a pattern signature for the pattern from the set of values.Type: GrantFiled: March 7, 2011Date of Patent: December 25, 2012Assignee: Cadence Design Systems, Inc.Inventors: Junjiang Lei, Srini Doddi, Weiping Fang
-
Patent number: 8291351Abstract: The present invention is directed to an improved method, system, and computer program product for accessing and analyzing patterns in the integrated circuit design. The method, system or computer program product includes generating an intelligent signature for a pattern. The derived pattern signature is an intelligent pattern identifier because it retains only essential information about a pattern that corresponds to lithography printable portions of the pattern. Accordingly, one pattern signature can represent a group of design patterns that are equivalents from a lithography perspective.Type: GrantFiled: June 1, 2011Date of Patent: October 16, 2012Assignee: Cadence Design Systems, Inc.Inventors: Junjiang Lei, Kuang-Hao Lay, Srini Doddi, Weiping Fang
-
Patent number: 8136068Abstract: Disclosed are a method, a system, and a computer program product for implementing compact manufacturing model during various stages of electronic circuit designs. In some embodiments, the method or the system receives or identifies physics based data. In some embodiments, the method or the system receives or identifies the physics based data for the corresponding manufacturing process by using the golden manufacturing process model. In some embodiments, the method or the system uses the physics based data to fine tune, modify, or adjust the golden manufacturing process model. In some embodiments, the method or the system invokes the just-right module. In some embodiments, the method or the system implements the compact manufacturing model and the correct-by-design module and provides guidelines for the various stages of the electronic circuit design.Type: GrantFiled: September 30, 2008Date of Patent: March 13, 2012Assignee: Cadence Design Systems, Inc.Inventors: Li J. Song, Srini Doddi, Emmanuel Drego, Nickhil Jakatdar
-
Publication number: 20110239168Abstract: The present invention is directed to an improved method, system, and computer program product for accessing and analyzing patterns in the integrated circuit design. The method, system or computer program product includes generating an intelligent signature for a pattern. The derived pattern signature is an intelligent pattern identifier because it retains only essential information about a pattern that corresponds to lithography printable portions of the pattern. Accordingly, one pattern signature can represent a group of design patterns that are equivalents from a lithography perspective.Type: ApplicationFiled: June 1, 2011Publication date: September 29, 2011Applicant: CADENCE DESIGN SYSTEMS, INC.Inventors: Junjiang Lei, Kuang-Hao Lay, Srini Doddi, Weiping Fang
-
Patent number: 7966586Abstract: The present invention is directed to an improved method, system, and computer program product for accessing and analyzing patterns in the integrated circuit design. The method, system or computer program product includes generating an intelligent signature for a pattern. The derived pattern signature is an intelligent pattern identifier because it retains only essential information about a pattern that corresponds to lithography printable portions of the pattern. Accordingly, one pattern signature can represent a group of design patterns that are equivalents from a lithography perspective.Type: GrantFiled: December 7, 2007Date of Patent: June 21, 2011Assignee: Cadence Design Systems, Inc.Inventors: Junjiang Lei, Kuang-Hao Lay, Srini Doddi, Weiping Fang
-
Patent number: 7904853Abstract: A method, system, and computer program product are disclosed for generating a pattern signature to represent a pattern in an integrated circuit design. In one approach, the method, system and computer program product transform pattern data, two dimensional data for the pattern, into a set of one dimensional mathematical functions, compress the set of one dimensional mathematical functions into a single variable function, compress the single variable function by calculating a set of values for the single variable function, and generate a pattern signature for the pattern from the set of values.Type: GrantFiled: December 27, 2007Date of Patent: March 8, 2011Assignee: Cadence Design Systems, Inc.Inventors: Junjiang Lei, Srini Doddi, Weiping Fang
-
Publication number: 20100083200Abstract: Disclosed are a method, a system, and a computer program product for implementing compact manufacturing model during various stages of electronic circuit designs. In some embodiments, the method or the system receives or identifies physics based data. In some embodiments, the method or the system receives or identifies the physics based data for the corresponding manufacturing process by using the golden manufacturing process model. In some embodiments, the method or the system uses the physics based data to fine tune, modify, or adjust the golden manufacturing process model. In some embodiments, the method or the system invokes the just-right module. In some embodiments, the method or the system implements the compact manufacturing model and the correct-by-design module and provides guidelines for the various stages of the electronic circuit design.Type: ApplicationFiled: September 30, 2008Publication date: April 1, 2010Applicant: Cadence Design Systems, Inc.Inventors: Li J. Song, Srini Doddi, Emmanuel Drege, Nickhil Jakatdar
-
Publication number: 20090169114Abstract: A method, system, and computer program product for preprocessing a pattern in a library of patterns and querying a preprocessed library of patterns are disclosed. Embodiments for querying a preprocessed library of patterns are disclosed for determining a distance between the representation for the first pattern and the representation for the second pattern, determining whether the distance between the representation for the first pattern and the representation for the second pattern is within the range for the first pattern, and transforming the second pattern with the transformation matrix to provide information about the second pattern.Type: ApplicationFiled: December 28, 2007Publication date: July 2, 2009Applicant: CADENCE DESIGN SYSTEMS, INC.Inventors: Srini Doddi, Junjiang Lei, Kuang-Hao Lay, Weiping Fang
-
Publication number: 20090150836Abstract: The present invention is directed to an improved method, system, and computer program product for accessing and analyzing patterns in the integrated circuit design. The method, system or computer program product includes generating an intelligent signature for a pattern. The derived pattern signature is an intelligent pattern identifier because it retains only essential information about a pattern that corresponds to lithography printable portions of the pattern. Accordingly, one pattern signature can represent a group of design patterns that are equivalents from a lithography perspective.Type: ApplicationFiled: December 7, 2007Publication date: June 11, 2009Applicant: CADENCE DESIGN SYSTEMS, INC.Inventors: Junjiang Lei, Kuang-Hao Lay, Srini Doddi, Weiping Fang
-
Publication number: 20050057748Abstract: A hypothetical profile is used to model the profile of a structure formed on a semiconductor wafer to use in determining the profile of the structure using optical metrology. To select a hypothetical profile, sample diffraction signals are obtained from measured diffraction signals of structures formed on the wafer, where the sample diffraction signals are a representative sampling of the measured diffraction signals. A hypothetical profile is defined and evaluated using a sample diffraction signal from the obtained sample diffraction signals.Type: ApplicationFiled: September 15, 2003Publication date: March 17, 2005Applicant: TimbreTechnologies, Inc.Inventors: Vi Vuong, Junwei Bao, Srini Doddi, Emmanuel Drege, Jin Wen, Sanjay Yedur, Doris Chin, Nickhil Jakatdar, Lawrence Lane