Patents by Inventor Srinivas Achanta
Srinivas Achanta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240368090Abstract: A crystalline form DP-9 of Daprodustat is provided, where an X-ray powder diffraction pattern of the crystalline form DP-9 shows one or more characteristic peaks at 6.4, 7.2, 7.5, 12.3, 15.1, 15.5, 16.6, 18.5, 19.3, 21.0, and 27.6±0.2 2?.Type: ApplicationFiled: May 3, 2024Publication date: November 7, 2024Inventors: BARLA RAJU, SHARMISTHA PAL, SRINIVAS ACHANTA, DEBJIT BASU, PAVANI SANKAR REDDY, ARUN AEDHUNURI, SRINIVASULU RANGINENI, NAGA SAI SWAROOP GANNAVARAPU
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Publication number: 20210260023Abstract: The present application relate to a purification process for preparation of halichondrin B analogues such as eribulin or pharmaceutically acceptable salts thereof having less than 0.15% or substantially free or free from one or more impurities. The present application also provide acid addition salts of eribulin and process for preparation thereof.Type: ApplicationFiled: July 19, 2019Publication date: August 26, 2021Inventors: Thomas MAHONEY, Pieter David DE KONING, Graham ANDREW MEEK, Srinivas ACHANTA, Rajeev Rehani BUDHDEV, Philip Mark JACKSON, Srinivas ORUGANTI, Lokeswara Rao MADIVADA
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Patent number: 11057021Abstract: A fixed latency configurable tap or fixed-tap digital filter may filter a signal in a fixed amount of time, regardless of the number of taps. The filter may include one or more of a clock, a plurality of registers in a shift register, an adder, an accumulator, and/or a scaler. In at least one embodiment, a running average may be maintained as samples are received such that the latency remains fixed with a constant number of clock cycles.Type: GrantFiled: September 30, 2019Date of Patent: July 6, 2021Assignee: Schweitzer Engineering Laboratories, Inc.Inventor: Srinivas Achanta
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Publication number: 20200369652Abstract: The present invention provides process for preparation of lifitegrast, amine salts of lifitegrast, process for preparation of amine salts of lifitegrast and their use in purification of lifitegrast, and also provided are process for preparation of amorphous lifitegrast and pharmaceutical compositions comprising lifitegrast prepared by the processes of the present invention.Type: ApplicationFiled: August 2, 2018Publication date: November 26, 2020Inventors: Srinivas ACHANTA, Ramesh CHAKKA, Vilas Hareshwar DAHANUKAR, Elati Ravi Rama CHANDRASEKHAR, Srinivasa Reddy BHIMAVARAPU, Mahendar MADARABOINA
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Patent number: 10676498Abstract: The present disclosure provides procedures and intermediates for the preparation of Sofosbuvir, comprising the step of reacting a compound of formula 2: wherein R1 and R2 can independently be hydrogen or halogen, provided that at least one of R1 and R2 is a halogen.Type: GrantFiled: June 2, 2016Date of Patent: June 9, 2020Assignee: Teva Pharmaceuticals International GmbHInventors: Vinod Kumar Kansal, Dhirenkumar Natvarial Mistry, Srinivas Achanta, Sundaraselvan Ariyamuthu, Miteshgir Kanchangir Goswami, Venkata Subbarao Yazali
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Publication number: 20200028494Abstract: A fixed latency configurable tap or fixed-tap digital filter may filter a signal in a fixed amount of time, regardless of the number of taps. The filter may include one or more of a clock, a plurality of registers in a shift register, an adder, an accumulator, and/or a scaler. In at least one embodiment, a running average may be maintained as samples are received such that the latency remains fixed with a constant number of clock cycles.Type: ApplicationFiled: September 30, 2019Publication date: January 23, 2020Applicant: Schweitzer Engineering Laboratories, Inc.Inventor: Srinivas Achanta
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Patent number: 10530339Abstract: A fixed latency configurable tap or fixed-tap digital filter may filter a signal in a fixed amount of time, regardless of the number of taps. The filter may include one or more of a clock, a plurality of registers in a shift register, an adder, an accumulator, and/or a scaler. In at least one embodiment, a running average may be maintained as samples are received such that the latency remains fixed with a constant number of clock cycles.Type: GrantFiled: February 17, 2017Date of Patent: January 7, 2020Assignee: Schweitzer Engineering Laboratories, Inc.Inventor: Srinivas Achanta
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Publication number: 20190218243Abstract: The present disclosure provides procedures and intermediates for the preparation of Sofosbuvir, comprising the step of reacting a compound of formula 2: wherein R1 and R2 can independently be hydrogen or halogen, provided that at least one of R1 and R2 is a halogen.Type: ApplicationFiled: June 2, 2016Publication date: July 18, 2019Inventors: Vinod Kumar KANSAL, Dhirenkumar Natvarial MISTRY, Srinivas ACHANTA, Sundaraselvan ARIYAMUTHU, Miteshgir Kanchangir GOSWAMI, Venkata Subbarao YAZALI
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Publication number: 20180238956Abstract: A fixed latency configurable tap or fixed-tap digital filter may filter a signal in a fixed amount of time, regardless of the number of taps. The filter may include one or more of a clock, a plurality of registers in a shift register, an adder, an accumulator, and/or a scaler. In at least one embodiment, a running average may be maintained as samples are received such that the latency remains fixed with a constant number of clock cycles.Type: ApplicationFiled: February 17, 2017Publication date: August 23, 2018Applicant: Schweitzer Engineering Laboratories, Inc.Inventor: Srinivas Achanta
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Patent number: 9813173Abstract: The time signal verification and distribution device disclosed herein verifies and distributes a time signal to consuming devices. The device determines a time quality status of a first and second time signal, calculates a difference between a first and a second time signal, and compares the difference to a predetermined threshold. Based on the time quality status and the comparison, the time signal verification and distribution device distributes a time signal to a plurality of time signal consuming devices. Exceeding the predetermined threshold may indicate a spoofing attack or other problem with the time signals.Type: GrantFiled: October 5, 2015Date of Patent: November 7, 2017Assignee: Schweitzer Engineering Laboratories, Inc.Inventors: Shankar V. Achanta, Srinivas Achanta, David E. Whitehead
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Patent number: 9319100Abstract: The present application discloses a time distribution device capable of providing a synchronized time signal to a plurality of end devices connected to the time distribution device with cables of various lengths. The time distribution device may receive a time signal, generate a time reference based on the received time signal, compensate the time reference for hardware delay, and overcompensate the time reference for a delay caused by a maximum cable length. Prior to being distributed to various end devices, each being connected with the time distribution device by cables of varying length, this overcompensated time reference may then be delayed by an amount based on the cable length connecting each respective end device such that the arrival of each of the synchronized time references at the various end devices is synchronized.Type: GrantFiled: August 12, 2013Date of Patent: April 19, 2016Assignee: Schweitzer Engineering Laboratories, Inc.Inventors: Srinivas Achanta, Hidayatullah Ahsan
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Publication number: 20160099803Abstract: The time signal verification and distribution device disclosed herein verifies and distributes a time signal to consuming devices. The device determines a time quality status of a first and second time signal, calculates a difference between a first and a second time signal, and compares the difference to a predetermined threshold. Based on the time quality status and the comparison, the time signal verification and distribution device distributes a time signal to a plurality of time signal consuming devices. Exceeding the predetermined threshold may indicate a spoofing attack or other problem with the time signals.Type: ApplicationFiled: October 5, 2015Publication date: April 7, 2016Inventors: Shankar V. Achanta, Srinivas Achanta, David E. Whitehead
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Patent number: 9300591Abstract: Disclosed is a network communication switch that facilitates reliable communication of high priority traffic over lower priority traffic across all ingress and egress ports. The network communication switch may monitor the frame storage buffer regardless of egress port, and when the frame storage buffer reaches a predetermined level, the switch may discard lower priority frames from the most congested port. When the frame storage buffer reaches a second predetermined level, the switch may discard lower priority frames before they are stored according to egress port. The network communication switch may further monitor ingress frames for priority, and assign priority to frames according to pre-assigned priority, ingress port, and/or frame contents.Type: GrantFiled: December 2, 2013Date of Patent: March 29, 2016Assignee: SCHWEITZER ENGINEERING LABORATORIES, INC.Inventors: Manodev J. Rajasekaran, David M. Rector, Damian Sanchez Moreno, M. Wesley Kunzler, Srinivas Achanta, Jerry J. Bennett, Ian C. Ender
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Patent number: 9270442Abstract: Disclosed herein are a variety of systems and methods for correcting for propagation delay in time signals used in connection with an electric power generation and delivery system. According to various embodiments, a device consistent with the present disclosure may determine an estimated propagation delay between an accurate time source and a receiving device. The propagation delay may be determined based on a variety of transmission parameters including, for example, communication channel type and/or length. A corrected time signal may be generated by advancing a reference incitation such as an “on-time” reference and/or “start-of-second” reference included in the time signal by an amount associated with the propagation delay. The corrected time signal may then be transmitted to the receiving device.Type: GrantFiled: April 29, 2014Date of Patent: February 23, 2016Assignee: Schweitzer Engineering Laboratories, Inc.Inventors: Raymond W. Rice, Srinivas Achanta
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Publication number: 20150312023Abstract: Disclosed herein are a variety of systems and methods for correcting for propagation delay in time signals used in connection with an electric power generation and delivery system. According to various embodiments, a device consistent with the present disclosure may determine an estimated propagation delay between an accurate time source and a receiving device. The propagation delay may be determined based on a variety of transmission parameters including, for example, communication channel type and/or length. A corrected time signal may be generated by advancing a reference incitation such as an “on-time” reference and/or “start-of-second” reference included in the time signal by an amount associated with the propagation delay. The corrected time signal may then be transmitted to the receiving device.Type: ApplicationFiled: April 29, 2014Publication date: October 29, 2015Applicant: Schweitzer Engineering Laboratories, Inc.Inventors: Raymond W. Rice, Srinivas Achanta
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Publication number: 20150043697Abstract: The present application discloses a time distribution device capable of providing a synchronized time signal to a plurality of end devices connected to the time distribution device with cables of various lengths. The time distribution device may receive a time signal, generate a time reference based on the received time signal, compensate the time reference for hardware delay, and overcompensate the time reference for a delay caused by a maximum cable length. Prior to being distributed to various end devices, each being connected with the time distribution device by cables of varying length, this overcompensated time reference may then be delayed by an amount based on the cable length connecting each respective end device such that the arrival of each of the synchronized time references at the various end devices is synchronized.Type: ApplicationFiled: August 12, 2013Publication date: February 12, 2015Applicant: Schweitzer Engineering Laboratories, Inc.Inventors: Srinivas Achanta, Hidayatullah Ahsan
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Publication number: 20140211624Abstract: Disclosed is a network communication switch that facilitates reliable communication of high priority traffic over lower priority traffic across all ingress and egress ports. The network communication switch may monitor the frame storage buffer regardless of egress port, and when the frame storage buffer reaches a predetermined level, the switch may discard lower priority frames from the most congested port. When the frame storage buffer reaches a second predetermined level, the switch may discard lower priority frames before they are stored according to egress port. The network communication switch may further monitor ingress frames for priority, and assign priority to frames according to pre-assigned priority, ingress port, and/or frame contents.Type: ApplicationFiled: December 2, 2013Publication date: July 31, 2014Applicant: SCHWEITZER ENGINEERING LABORATORIES, INC.Inventors: Manodev J. Rajasekaran, David M. Rector, Damian Sanchez Moreno, M. Wesley Kunzler, Srinivas Achanta, Jerry J. Bennett, Ian C. Ender
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Patent number: 6856861Abstract: Methods and apparatus are provided for customizing the cosmetics used by a consumer. A consumer provides selection data and a cosmetic product formula is generated therefrom, base ingredients are then dispensed in accordance with the formula and a customized cosmetic product is delivered onto an intermediate surface for subsequent application. Further, a cartridge providing fluids to a customized cosmetic device is disclosed comprising one or more fluids, the fluids are stored in the cartridge, and one or more openings are provided for dispensing the fluids to a customized cosmetic product.Type: GrantFiled: November 14, 2002Date of Patent: February 15, 2005Assignee: The Procter & Gamble CompanyInventors: Robert S. Dirksing, Srinivas Achanta
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Patent number: 6706298Abstract: A method for preparing dehydrated fruits, vegetables and tubers, particularly potato products. The steps of the method include: boiling the whole raw edible product or slices or pieces of the raw edible product for a time sufficient to partially cook the starch and soften the tissue of the edible product; comminuting the cooked product; and drying the comminuted product. The raw edible product is preferably unpeeled or partially peeled.Type: GrantFiled: April 20, 2000Date of Patent: March 16, 2004Assignee: The Procter & Gamble Co.Inventors: Maria Dolores Martinez-Serna Villagran, Joan Carol Wooten, Eileen Marie Boyle, Jianjun Li, Donald Ray Patton, Srinivas Achanta
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Patent number: 6696095Abstract: A method for preparing dehydrated fruits, vegetables and tubers, particularly potato products. The steps of the method include: boiling the whole raw edible product or slices or pieces of the raw edible product for a time sufficient to partially cook the starch and soften the tissue of the edible product; comminuting the cooked product; and drying the comminuted product.Type: GrantFiled: April 20, 2000Date of Patent: February 24, 2004Assignee: The Procter & Gamble Co.Inventors: Maria Dolores Martinez-Serna Villagren, Joan Carol Wooten, Eileen Marie Boyle, Jianjun Li, Donald Ray Patton, Srinivas Achanta