Patents by Inventor Srinivas Cheedella

Srinivas Cheedella has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Read/write separation in video request manager
    Patent number: 8948263
    Abstract: A video request manager comprises a first state machine. The first state machine commands a memory controller to fetch reference pixels for a first portion of a picture. The second state machine commands a memory controller to write a second portion of the picture.
    Type: Grant
    Filed: April 1, 2004
    Date of Patent: February 3, 2015
    Assignee: Broadcom Corporation
    Inventors: Ramadas Lakshmikanth Pai, Chhavi Kishore, Srinivas Cheedella
  • Read/write separation in video request manager
    Publication number: 20050169375
    Abstract: A video request manager comprises a first state machine. The first state machine commands a memory controller to fetch reference pixels for a first portion of a picture. The second state machine commands a memory controller to write a second portion of the picture.
    Type: Application
    Filed: April 1, 2004
    Publication date: August 4, 2005
    Inventors: Ramadas Pai, Chhavi Kishore, Srinivas Cheedella
  • Motion vector address computer error detection
    Publication number: 20050169376
    Abstract: Described herein is a video decoding related system and method for error detection in a motion vector address computer. A circuit determines addresses for reference pixels. The circuit comprises an input and logic. The input receives parameters comprising a picture type indicator for indicating a type of a picture. The logic determines whether the parameters received by the input are valid.
    Type: Application
    Filed: April 1, 2004
    Publication date: August 4, 2005
    Inventors: Ramadas Pai, Srinivas Cheedella, Manoj Vajhallya
  • System, method, and apparatus for reducing memory and bandwidth requirements in decoder system
    Publication number: 20040252762
    Abstract: A system, method, and apparatus for reducing memory and processing requirements in a decoder system are presented herein. The memory and processing requirements are reduced by generating virtual pixels on the fly. Generating the virtual pixels on the fly, as opposed to storing the virtual pixels reduces the memory requirements of the frame buffer. Additionally, generation on the fly also reduces the fetch instructions required to retrieve the virtual pixels from the frame buffer.
    Type: Application
    Filed: June 16, 2003
    Publication date: December 16, 2004
    Inventors: R. Lakshmikanth Pai, Chhavi Kishore, Srinivas Cheedella