Abstract: An example apparatus includes: a first transistor having a first terminal and a control terminal; a second transistor having a first terminal and a control terminal, the first terminal of the second transistor coupled to the first terminal of the first transistor; a third transistor having a first terminal and a control terminal; a fourth transistor having a first terminal and a control terminal, the first terminal of the fourth transistor coupled to the first terminal of the third transistor; feedback circuitry coupled to the first transistor, the second transistor, the third transistor and the fourth transistor; current source circuitry having a first terminal and a second terminal, the first terminal of the current source circuitry coupled to the feedback circuitry; slew assist circuitry coupled to the first transistor, the second transistor, the third transistor and the fourth transistor, the feedback circuitry and the current source circuitry.

Abstract: An integrated circuit (IC) includes first, second, third, and fourth transistors, first and second current source devices, and a trim circuit. The first transistor has a first control input and a first current terminal. The second transistor has a second control input and a second current terminal. The third transistor had a third control input and third and fourth current terminals. The fourth transistor has a fourth control input and fifth and sixth current terminals. The first current source is coupled between a first power supply node and the third current terminal. The second current source is coupled between the first supply node and the fifth current terminal. The trim circuit is coupled between the fourth current terminal and a second power supply node, and is coupled between the sixth current terminal and the second power supply node. The trim circuit includes a resistive digital-to-analog converter (RDAC) circuit.

Abstract: An integrated circuit (IC) includes first, second, third, and fourth transistors, first and second current source devices, and a trim circuit. The first transistor has a first control input and a first current terminal. The second transistor has a second control input and a second current terminal. The third transistor had a third control input and third and fourth current terminals. The fourth transistor has a fourth control input and fifth and sixth current terminals. The first current source is coupled between a first power supply node and the third current terminal. The second current source is coupled between the first supply node and the fifth current terminal. The trim circuit is coupled between the fourth current terminal and a second power supply node, and is coupled between the sixth current terminal and the second power supply node. The trim circuit includes a resistive digital-to-analog converter (RDAC) circuit.

Abstract: A chopper amplifier circuit includes a first amplifier path, a second amplifier path, and a third amplifier path. The first amplifier path includes chopper circuitry configured to modulate an input signal and an offset voltage at a chopping frequency, and ripple reduction circuitry configured to attenuate the chopping frequency in a signal in the first amplifier path. The second amplifier path includes a feedforward gain stage, and is configured to apply higher gain to intermediate signal frequencies than is applied in the first amplifier path. The third amplifier path includes a feedforward gain stage, and is configured to apply higher gain to high signal frequencies than is applied in the first amplifier path and the second amplifier path. The intermediate signal frequencies are lower than the high signal frequencies.

Abstract: A voltage regulator includes a first transistor including a first terminal to receive an input voltage and a second transistor including a first terminal coupled to a second terminal of the first transistor. A charge pump couples to the second transistor and to an output voltage node. An amplifier receives a feedback voltage derived from the output voltage and generates a control signal to gates of the transistors. Responsive to the input voltage being more than a threshold larger than the output voltage, the amplifier maintains the second transistor off and the first transistor on such that current flows through the first transistor to the output voltage node but not the second transistor. Responsive to the input voltage being less than the threshold amount, the amplifier operates the first transistor in a triode mode and turns on the second transistor to provide current to the charge pump.

Abstract: An integrated circuit (IC) includes first, second, third, and fourth transistors, first and second current source devices, and a trim circuit. The first transistor has a first control input and a first current terminal. The second transistor has a second control input and a second current terminal. The third transistor had a third control input and third and fourth current terminals. The fourth transistor has a fourth control input and fifth and sixth current terminals. The first current source is coupled between a first power supply node and the third current terminal. The second current source is coupled between the first supply node and the fifth current terminal. The trim circuit is coupled between the fourth current terminal and a second power supply node, and is coupled between the sixth current terminal and the second power supply node. The trim circuit includes a resistive digital-to-analog converter (RDAC) circuit.

Abstract: A chopper amplifier circuit includes a first amplifier path with chopper circuitry, a switched-capacitor filter, and multiple gain stages. The chopper amplifier circuit also includes a second amplifier path with a feed-forward gain stage. A chopping frequency of the chopper circuitry is greater than a threshold frequency at which the second amplifier path is used instead of the first amplifier path.

Abstract: An integrated circuit (IC) includes first, second, third, and fourth transistors, first and second current source devices, and a trim circuit. The first transistor has a first control input and a first current terminal. The second transistor has a second control input and a second current terminal. The third transistor had a third control input and third and fourth current terminals. The fourth transistor has a fourth control input and fifth and sixth current terminals. The first current source is coupled between a first power supply node and the third current terminal. The second current source is coupled between the first supply node and the fifth current terminal. The trim circuit is coupled between the fourth current terminal and a second power supply node, and is coupled between the sixth current terminal and the second power supply node. The trim circuit includes a resistive digital-to-analog converter (RDAC) circuit.

Abstract: A chopper amplifier circuit includes a first amplifier path, a second amplifier path, and a third amplifier path. The first amplifier path includes chopper circuitry configured to modulate an input signal and an offset voltage at a chopping frequency, and ripple reduction circuitry configured to attenuate the chopping frequency in a signal in the first amplifier path. The second amplifier path includes a feedforward gain stage, and is configured to apply higher gain to intermediate signal frequencies than is applied in the first amplifier path. The third amplifier path includes a feedforward gain stage, and is configured to apply higher gain to high signal frequencies than is applied in the first amplifier path and the second amplifier path. The intermediate signal frequencies are lower than the high signal frequencies.

Abstract: A chopper amplifier circuit includes a first amplifier path with chopper circuitry, a switched-capacitor filter, and multiple gain stages. The chopper amplifier circuit also includes a second amplifier path with a feed-forward gain stage. A chopping frequency of the chopper circuitry is greater than a threshold frequency at which the second amplifier path is used instead of the first amplifier path.

Abstract: In examples, a system comprises a differential amplifier coupled to a parasitic capacitor positioned between a first node and a first reference voltage source. The system comprises a buffer amplifier having an input terminal and an output terminal, the input terminal coupled to the first node and the output terminal coupled to a cancellation capacitor. The system includes a controlled current source coupled to the first node and the input terminal, the controlled current source coupled to a second reference voltage source. The system comprises a current sense circuit coupled to the cancellation capacitor and the second reference voltage source.

Abstract: In examples, a system comprises a differential amplifier coupled to a parasitic capacitor positioned between a first node and a first reference voltage source. The system comprises a buffer amplifier having an input terminal and an output terminal, the input terminal coupled to the first node and the output terminal coupled to a cancellation capacitor. The system includes a controlled current source coupled to the first node and the input terminal, the controlled current source coupled to a second reference voltage source. The system comprises a current sense circuit coupled to the cancellation capacitor and the second reference voltage source.

Abstract: A voltage-to-current converter that reduces third harmonic distortion. An amplifier includes an input stage. The input stage includes a first voltage-to-current conversion stage and a second voltage-to-current conversion stage. The first voltage-to-current conversion stage is configured to provide an input to output gain with compressive nonlinearity. The second voltage-to-current stage is cascaded with the first voltage-to-current conversion stage. An input of the second voltage-to-current stage is connected to an output of the first voltage-to-current conversion stage. The second voltage-to-current conversion stage is configured to provide an input to output gain with expansive nonlinearity.

Abstract: In examples, a system comprises a differential amplifier coupled to a parasitic capacitor positioned between a first node and a first reference voltage source. The system comprises a buffer amplifier having an input terminal and an output terminal, the input terminal coupled to the first node and the output terminal coupled to a cancellation capacitor. The system includes a controlled current source coupled to the first node and the input terminal, the controlled current source coupled to a second reference voltage source. The system comprises a current sense circuit coupled to the cancellation capacitor and the second reference voltage source.

Abstract: In examples, a system comprises a differential amplifier coupled to a parasitic capacitor positioned between a first node and a first reference voltage source. The system comprises a buffer amplifier having an input terminal and an output terminal, the input terminal coupled to the first node and the output terminal coupled to a cancellation capacitor. The system includes a controlled current source coupled to the first node and the input terminal, the controlled current source coupled to a second reference voltage source. The system comprises a current sense circuit coupled to the cancellation capacitor and the second reference voltage source.

Abstract: A voltage regulator includes a first transistor including a first terminal to receive an input voltage and a second transistor including a first terminal coupled to a second terminal of the first transistor. A charge pump couples to the second transistor and to an output voltage node. An amplifier receives a feedback voltage derived from the output voltage and generates a control signal to gates of the transistors. Responsive to the input voltage being more than a threshold larger than the output voltage, the amplifier maintains the second transistor off and the first transistor on such that current flows through the first transistor to the output voltage node but not the second transistor. Responsive to the input voltage being less than the threshold amount, the amplifier operates the first transistor in a triode mode and turns on the second transistor to provide current to the charge pump.

Abstract: A voltage-to-current converter that reduces third harmonic distortion. An amplifier includes an input stage. The input stage includes a first voltage-to-current conversion stage and a second voltage-to-current conversion stage. The first voltage-to-current conversion stage is configured to provide an input to output gain with compressive nonlinearity. The second voltage-to-current stage is cascaded with the first voltage-to-current conversion stage. An input of the second voltage-to-current stage is connected to an output of the first voltage-to-current conversion stage. The second voltage-to-current conversion stage is configured to provide an input to output gain with expansive nonlinearity.

Abstract: At least some embodiments are directed to a system that comprises a differential input transistor pair (DITP) comprising first and second transistors, a first feedback loop coupled to the first transistor, and a second feedback loop coupled to the second transistor. When a differential voltage applied to the input stage is within a first range, the first and second feedback loops control a tail current supplied to the DITP, where the tail current at least partially determines a transconductance of the DITP. When the differential voltage is within a second range, the transconductance of the DITP is at least partially determined by a first resistor in the first feedback loop or by a second resistor in the second feedback loop.

Abstract: An amplifier includes an amplifier input and an amplifier output. A compensation network is coupled to the amplifier output. The compensation network includes at least one RC network tuned to a frequency in which the amplifier operates. The compensation network provides at least one zero to compensate for at least one pole introduced by a load coupled to the amplifier output.

Abstract: A voltage regulator includes a first transistor including a first terminal to receive an input voltage and a second transistor including a first terminal coupled to a second terminal of the first transistor. A charge pump couples to the second transistor and to an output voltage node. An amplifier receives a feedback voltage derived from the output voltage and generates a control signal to gates of the transistors. Responsive to the input voltage being more than a threshold larger than the output voltage, the amplifier maintains the second transistor off and the first transistor on such that current flows through the first transistor to the output voltage node but not the second transistor. Responsive to the input voltage being less than the threshold amount, the amplifier operates the first transistor in a triode mode and turns on the second transistor to provide current to the charge pump.