Patents by Inventor Srinivas K.

Srinivas K. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120078929
    Abstract: A method, computer program product, and system for enabling parallel processing of an XML document without pre-parsing, utilizing metadata associated with the XML document and created at the same time as the XML document. The metadata is used to generate partitions of the XML document at the time of parallel processing, without requiring system-intensive pre-parsing.
    Type: Application
    Filed: September 29, 2010
    Publication date: March 29, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Manoj K. Agarwal, Manish A. Bhide, Srinivas K. Mittapalli, Sriram K. Padmanabhan, Girish Venkatachaliah
  • Publication number: 20110291625
    Abstract: A voltage regulator may derive current from a bias circuitry having a constant-transconductance. The bias circuitry may generate the bias current using three NMOS devices. The temperature coefficient of the bias current may be within a specified, desired range. The bias current may be mirrored to low-power regulator circuitry to bias a diode-connected transistor in the low-power regulator circuitry to operate in the strong inversion region. A ratioed current based on the output load current may be injected into a bipolar junction transistor (BJT) device to cause the gate-source voltage (VGS) of the diode-connected device to track the VGS of the output transistor of the voltage regulator, to ensure tighter load regulation.
    Type: Application
    Filed: May 18, 2011
    Publication date: December 1, 2011
    Inventors: Srinivas K. Pulijala, Scott C. McLeod
  • Publication number: 20110287001
    Abstract: The invention provides methods for inducing apoptosis, comprising treatment of a patient with a TNF? inhibitor as well as with an IAP inhibitor and a TRAIL receptor agonist. The methods ameliorate the risk of unwanted effects, thereby resulting in an improved therapeutic index for IAP inhibitors in combination with a TRAIL receptor agonist.
    Type: Application
    Filed: August 5, 2009
    Publication date: November 24, 2011
    Applicants: TETRALOGIC PHARMACEUTICALS, AMGEN INC.
    Inventors: Pamela M. Holland, Julia C. Piasecki, Christopher A. Benetatos, Srinivas K. Chunduru, Mark A. McKinlay
  • Publication number: 20110191323
    Abstract: Methods and arrangements for extracting tuples from a streaming XML document. A query twig is applied to the XML document stream, tuples are extracted from the XML document stream based on the query twig, and a quantity of extracted tuples is limited via foregoing extraction of duplicate tuples extraction of tuples that do not satisfy query twig criteria.
    Type: Application
    Filed: January 31, 2010
    Publication date: August 4, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Manoj K. Agarwal, Manish A. Bhide, Srinivas K. Mittapalli, Mukesh K. Mohania, Sriram K. Padmanabhan
  • Patent number: 7907003
    Abstract: An electronic circuit may comprise an input stage powered by a supply voltage and configured to receive a reference signal. The circuit may further comprise an output stage powered by the supply voltage and coupled to the input stage, and configured to generate an error signal based on: the reference signal, and a feedback signal based on an output signal. The circuit may also include a pass transistor powered by the supply voltage and configured to generate the output signal based on the error signal. A capacitor coupled between the supply voltage and the output stage may increase the current flowing in the output stage, resulting in the output stage conducting current even during a rising edge of the supply voltage, preventing the output signal from reaching the level of the supply voltage during the rising edge of the supply voltage.
    Type: Grant
    Filed: January 14, 2009
    Date of Patent: March 15, 2011
    Assignee: Standard Microsystems Corporation
    Inventors: Srinivas K. Pulijala, Paul F. Illegems
  • Patent number: 7893670
    Abstract: A voltage regulator may comprise a regulator output configured to provide a regulated voltage, which may be controlled by an error amplifier based on the regulated voltage and a reference voltage. The error amplifier may control a source-follower stage to mirror a multiple of the current flowing in the source-follower stage into an internal pass device. A voltage developed by the mirror current may control an external pass device configured to deliver the load current into the regulator output. A first resistor may be configured to decouple a load capacitor coupled between the regulator output and reference ground, when the load current is below a specified value. A second resistor may be configured to create a bias current in the internal pass device even when the external pass device is close to cut-off region. A third resistor may be configured to counter the effects of negative impedance at the control terminal of the external pass device caused by the current-gain of the external pass device.
    Type: Grant
    Filed: February 20, 2009
    Date of Patent: February 22, 2011
    Assignee: Standard Microsystems Corporation
    Inventors: Srinivas K. Pulijala, Scott C. McLeod
  • Publication number: 20110008802
    Abstract: TNF? gene expression can be used as a biomarker of a cell's sensitivity to antagonists of inhibitor of apoptosis proteins (IAPs). Methods of the invention are useful for screening patients to identify those who could benefit from administration of an IAP antagonist to treat various malignant or benign tumors, benign proliferative diseases, or autoimmune diseases.
    Type: Application
    Filed: May 7, 2008
    Publication date: January 13, 2011
    Applicant: TETRALOGIC PHARMACEUTICALS CORP.
    Inventors: Alireza Alavi, Mark A. McKinlay, Srinivas K. Chunduru, John Silke, David Vaux, James Vince
  • Publication number: 20100270808
    Abstract: A wind energy apparatus is made up of a plurality of modular wind energy devices or units. Each unit has a housing and at least two turbines mounted on the housing. Each of the turbines has a blade set extending upward from the housing. Each blade set has a vertical axis extending upward in relation to the housing. Each of the turbines has a generator connected thereto, each generator being disposed in the housing, and having a rotor and a stator. Each turbine is rotatably mounted with respect to the housing, and mounted to the rotor so that they rotate together. Each housing has a positive connector and negative connector on each side of the respective unit. The units, when placed together, connect their respective poles, positive and negative, together completing a circuit. Therefore, one may connect multiple units together.
    Type: Application
    Filed: January 29, 2010
    Publication date: October 28, 2010
    Inventors: Daniel L. Bates, Bob G. Schlicher, John R. Owen, Ravi K. Tangirala, Srinivas K. Guntur, Gary E. Johnson
  • Publication number: 20100213917
    Abstract: A voltage regulator may comprise a regulator output configured to provide a regulated voltage, which may be controlled by an error amplifier based on the regulated voltage and a reference voltage. The error amplifier may control a source-follower stage to mirror a multiple of the current flowing in the source-follower stage into an internal pass device. A voltage developed by the mirror current may control an external pass device configured to deliver the load current into the regulator output. A first resistor may be configured to decouple a load capacitor coupled between the regulator output and reference ground, when the load current is below a specified value. A second resistor may be configured to create a bias current in the internal pass device even when the external pass device is close to cut-off region. A third resistor may be configured to counter the effects of negative impedance at the control terminal of the external pass device caused by the current-gain of the external pass device.
    Type: Application
    Filed: February 20, 2009
    Publication date: August 26, 2010
    Inventors: Srinivas K. Pulijala, Scott C. McLeod
  • Publication number: 20100176875
    Abstract: An electronic circuit may comprise an input stage powered by a supply voltage and configured to receive a reference signal. The circuit may further comprise an output stage powered by the supply voltage and coupled to the input stage, and configured to generate an error signal based on: the reference signal, and a feedback signal based on an output signal. The circuit may also include a pass transistor powered by the supply voltage and configured to generate the output signal based on the error signal. A capacitor coupled between the supply voltage and the output stage may increase the current flowing in the output stage, resulting in the output stage conducting current even during a rising edge of the supply voltage, preventing the output signal from reaching the level of the supply voltage during the rising edge of the supply voltage.
    Type: Application
    Filed: January 14, 2009
    Publication date: July 15, 2010
    Inventors: Srinivas K. Pulijala, Paul F. Illegems
  • Patent number: 7747475
    Abstract: This disclosure pertains to techniques for intelligent selection of a currency preference for a user and conversion of monetary values to the preferred currency for transactions entered into by the user. The conversion is performed using a firm exchange rate that is derived from a market exchange rate, but guaranteed for a period of time during which the transaction is anticipated to be completed.
    Type: Grant
    Filed: September 5, 2008
    Date of Patent: June 29, 2010
    Assignee: Amazon Technologies, Inc.
    Inventors: Mary Kay Bowman, Eileen Tracey Quenin, Thomas L. Kovarik, Srinivas K. Rao, Rohit Jain, Nitesh Goyal
  • Patent number: 7622954
    Abstract: A level-shifter circuit configured to transfer data between two voltage supply domains may eliminate crowbar current while simultaneously providing a valid output signal. The level-shifter circuit may transfer a data signal between the two voltage domains using a latch that is capable of maintaining its output level—based on the destination supply rail—to correspond to the same state to which the level of the input signal—based on the originating supply rail—corresponds, even when the originating supply is decreased to a zero-volt state, or to a voltage equivalent to a low state. During normal operation, when both power supplies are available, the signal at the output of the latch, and hence at the output of the level-shifter circuit may toggle to always track the input signal. Thus, the level of the signal at the output of the level-shifter may always represent the same state (e.g.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: November 24, 2009
    Assignee: Standard Microsystems Corporation
    Inventors: Paul F. Illegems, Srinivas K. Pulijala
  • Publication number: 20090212842
    Abstract: A level-shifter circuit configured to transfer data between two voltage supply domains may eliminate crowbar current while simultaneously providing a valid output signal. The level-shifter circuit may transfer a data signal between the two voltage domains using a latch that is capable of maintaining its output level—based on the destination supply rail—to correspond to the same state to which the level of the input signal—based on the originating supply rail—corresponds, even when the originating supply is decreased to a zero-volt state, or to a voltage equivalent to a low state. During normal operation, when both power supplies are available, the signal at the output of the latch, and hence at the output of the level-shifter circuit may toggle to always track the input signal. Thus, the level of the signal at the output of the level-shifter may always represent the same state (e.g.
    Type: Application
    Filed: February 26, 2008
    Publication date: August 27, 2009
    Inventors: Paul F. Illegems, Srinivas K. Pulijala
  • Publication number: 20090051443
    Abstract: A circuit may comprise an amplifier powered by a first supply voltage, with a first input of the amplifier coupled to a stable reference voltage, and the output voltage of the amplifier provided as a designated supply voltage to an oscillator configured to produce a periodic signal having a specified frequency. The circuit may further include a control circuit coupled to a second input of the amplifier, to the output of the amplifier, and to ground, and configured to control the rate of change of the output voltage of the amplifier with respect to temperature. This rate of change may be specified according to a characterization of the oscillator over supply voltage and temperature, and may result in stabilizing the specified frequency across temperature. The periodic signal may therefore be unaffected by variations in the first supply voltage, and the amplitude of the periodic signal may be proportional to the stable reference voltage.
    Type: Application
    Filed: August 24, 2007
    Publication date: February 26, 2009
    Inventors: Paul F. Illegems, Srinivas K. Pulijala
  • Patent number: 6496790
    Abstract: A method processes the outputs of a discrete sensor in a computer system. An initial value mask is applied to each one of the offset bits in the output of the discrete sensor. An initial value is obtained for each one of the offset bits in the output of the discrete sensor according to the initial value mask. It is next determined whether or not the offset bits in the output of the discrete sensor includes both initialization offset bits and transition offset bits. If the offset bits include both initialization offset bits and transition bits, only the initialization bits of an incoming mask corresponding to the output of the discrete sensor are reset.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: December 17, 2002
    Assignee: Intel Corporation
    Inventors: Srinivas K. Kathavate, David R. Richardson
  • Patent number: 5698371
    Abstract: A photocurable composition useful in preparing water-developable, solid printing plates is prepared by blending a urethane (meth)acrylate prepolymer with a complexing polymer based on poly(vinyl pyrrolidone) composition. The resulting composition is suitably formulated with additional photoactive (meth)acrylate monomers or oligomers and photoinitiator for casting or extrusion on a substrate to form a flexographic printing plate. Following UV exposure of the plate through a negative, unexposed areas can be removed by washing with aqueous media, to give a plate with a desirable relief image. The use of the aqueous washout solution as opposed to organic solvents minimizes pollution problems. The use of the complexing polymer significantly reduces the cold flow of the uncured plate and both increases toughness and reduces tack of the cured plate.
    Type: Grant
    Filed: May 16, 1994
    Date of Patent: December 16, 1997
    Assignee: PT Sub, Inc.
    Inventors: Srinivas K. Mirle, Truc-Chi T. Huynh-Tran
  • Patent number: 5500470
    Abstract: A water-based bonding agent material made of an acrylic polymer or copolymer emulsion, metal salt complexed with an amine and surfactant is useful for unitizing packages having synthetic polymer surfaces.
    Type: Grant
    Filed: September 6, 1994
    Date of Patent: March 19, 1996
    Assignee: W.R. Grace & Co.-Conn.
    Inventors: Srinivas K. Mirle, Eugene E. Carney
  • Patent number: 5496682
    Abstract: Dense sintered parts of ceramic and/or metallic materials are formed using stereo photolithography. An initial flowable mixture of sinterable inorganic particles, photocurable monomer, photoinitiator and dispersant is flowed over a substrate and cured in a selective pattern. Subsequent layers of the mixture are flowed over the substrate and cured to build a three dimensional body. The body is then fired to produce a dense sintered part. Parts having in excess of 95% of theoretical density can be produced.
    Type: Grant
    Filed: October 15, 1993
    Date of Patent: March 5, 1996
    Assignee: W. R. Grace & Co.-Conn.
    Inventors: Tariq Quadir, Srinivas K. Mirle, John S. Hallock
  • Patent number: 5462835
    Abstract: An aqueous developable, photocurable composition and a method of improving solvent resistance and flexibility are disclosed. The composition comprises (a) an acid-containing copolymer having an acid ephr of at least 0.20 and (b) an acid-containing polymer suitable for flexibilizing the composition, which has at least one free ethylenically unsaturated group. It is preferable that either (a) or (b) or both are further reacted with a compound having a free ethylenically unsaturated group and a free acid reactive group, e.g. glycidyl(meth)acrylate. When the composition is formulated with an ethylenically unsaturated monomer and photoinitiator, the photocurable composition is especially suitable for use in an aqueous developable, flexible printing plate.
    Type: Grant
    Filed: September 16, 1991
    Date of Patent: October 31, 1995
    Assignee: P T Sub Inc.
    Inventors: Srinivas K. Mirle, Trevor J. Williams
  • Patent number: 5418112
    Abstract: A method useful for stereolithography that yields enhanced photospeed, as well as a photocurable polymer composition well adapted for use with same, are disclosed.A preferred combination includes 1,2-dimethoxy-2-phenyl acetophenone, benzophenone, and triphenyl phosphine combined with a polyurethane (meth)acrylate oligomer.
    Type: Grant
    Filed: November 10, 1993
    Date of Patent: May 23, 1995
    Assignee: W. R. Grace & Co.-Conn.
    Inventors: Srinivas K. Mirle, Ronald J. Kumpfmiller