Abstract: Various aspects of the present disclosure relate to training a node of a two-sided model. When a new user equipment (UE) side node is added to a two-sided model, training information representing a trained model is received (e.g., from the network side). An encoder model for the UE is trained based at least in part on the training information and, once trained, the UE transmits data encoded at the UE using the trained encoder model. When a new network (e.g., base station) side node is added to the two-sided model, training information associated with one or more UEs is received. A decoder model for the base station is trained based at least in part on the training information and, once trained, the base station uses the trained decoder model to decode data encoded at and received from UE.

Abstract: Various aspects of the present disclosure relate to training dataset updates. A training dataset is partitioned into multiple dataset groups and each dataset group includes one or more training datapoints. Each dataset group is associated with a first label and a second label. The first label corresponds to a temporal or time-domain related parameter, such as a time stamp or a time duration. The second label is at least one of a weight or a value associated with a characteristic of the dataset. The training dataset is updated based on at least one of the first label or the second label, such as by updating a subset of values of the second label, removing a dataset group, or adding a new dataset group to the training dataset. Updated information corresponding to the updated training dataset can then be sent from one device to another.

Abstract: Techniques and architecture are described to control a debug port access employing the debug image signed offline by a challenge/response mechanism, where the signed image itself is tied to an ECID of a chip together with debug lifecycle information coming from fuses and a hash of a loader being debugged. All these inputs form a nonce (the debug image) that ties the debug image to the hardware being debugged and is restricted to the current debug lifecycle. The cryptographically signed debug image is authenticated by a boot image (or the chip) with a public key in the debug image. The debug image may be expanded to secure maintenance using a secure maintenance blob or “firmware maintenance certificate or nonce.” The secure maintenance blob also includes a natural attribute list of low-level features to be enabled upon verification of the secure maintenance blob.

Abstract: In one embodiment, a method including transmitting data cells through a plurality of queues to an input of a processor is disclosed. The method includes transmitting data cells from an output of the processor to corresponding virtual circuits. The amount of data transmitted through each queue is computed. The cumulative amount of data transmitted through all queues is also computed. For each queue, a ratio of the amount of data transmitted through the queue to the cumulative amount of data transmitted through all queues is determined. The method also determines an amount of processor time for each queue using the ratio for the queue.