Abstract: A method for testing a power converter having at least one power transistor is disclosed. The method may include receiving a power transistor test request, and resetting a fault flag for each power transistor, wherein the fault flag indicates a fault status associated with a corresponding power transistor. The method may also include applying a gate driver signal to each power transistor, receiving a feedback signal from each power transistor, and determining a difference between the gate driver signal and the feedback signal associated with a respective power transistor. The method may further include identifying a power transistor fault if the difference exceeds a threshold profile, and setting the fault flag for the power transistor on which a power transistor fault is identified.