Patents by Inventor Srinivas Parimi

Srinivas Parimi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10990762
    Abstract: A device may receive information associated with a set of chat logs. The device may obtain context information associated with the information, wherein the context information identifies a network address associated with a participant of the set of chat logs. The device may determine whether the set of chat logs is to be assigned to a first category, a second category, or a third category, wherein the first category is associated with fraudulent chat logs, wherein the second category is associated with chat logs involving a misrepresentation, and wherein the third category is associated with chat logs that are not identified as fraudulent or involving a misrepresentation. The device may perform an action based on whether the set of chat logs is assigned to the first category, the second category, or the third category.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: April 27, 2021
    Assignee: Verizon Patent and Licensing Inc.
    Inventors: Ravi Karan Madavarapu, Jiandong Guo, Shail Bhatt, Apurva J. Sheth, Srinivas Parimi
  • Publication number: 20200302017
    Abstract: A device may receive information associated with a set of chat logs. The device may obtain context information associated with the information, wherein the context information identifies a network address associated with a participant of the set of chat logs. The device may determine whether the set of chat logs is to be assigned to a first category, a second category, or a third category, wherein the first category is associated with fraudulent chat logs, wherein the second category is associated with chat logs involving a misrepresentation, and wherein the third category is associated with chat logs that are not identified as fraudulent or involving a misrepresentation. The device may perform an action based on whether the set of chat logs is assigned to the first category, the second category, or the third category.
    Type: Application
    Filed: March 21, 2019
    Publication date: September 24, 2020
    Inventors: Ravi Karan MADAVARAPU, Jiandong GUO, Shail BHATT, Apurva J. SHETH, Srinivas PARIMI
  • Patent number: 7723760
    Abstract: The present invention is a MEMS-based two-phase LHP (loop heat pipe) and CPL (capillary pumped loop) using semiconductor grade silicon and microlithographic/anisotrophic etching techniques to achieve a planar configuration. The principal working material is silicon (and compatible borosilicate glass where necessary), particularly compatible with the cooling needs for electronic and computer chips and package cooling. The microloop heat pipes (?LHP™) utilize cutting edge microfabrication techniques. The device has no pump or moving parts, and is capable of moving heat at high power densities, using revolutionary coherent porous silicon (CPS) wicks. The CPS wicks minimize packaging thermal mismatch stress and improves strength-to-weight ratio. Also burst-through pressures can be controlled as the diameter of the coherent pores can be controlled on a sub-micron scale. The two phase planar operation provides extremely low specific thermal resistance (20-60 w/cm2).
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: May 25, 2010
    Assignee: University of Cincinnati
    Inventors: H. Thurman Henderson, Ahmed Shuja, Srinivas Parimi, Frank M. Gerner, Praveen Medis
  • Patent number: 7723845
    Abstract: The present invention is a MEMS-based two-phase LHP (loop heat pipe) and CPL (capillary pumped loop) using semiconductor grade silicon and microlithographic/anisotrophic etching techniques to achieve a planar configuration. The principal working material is silicon (and compatible borosilicate glass where necessary), particularly compatible with the cooling needs for electronic and computer chips and package cooling. The microloop heat pipes (?LHP™) utilize cutting edge microfabrication techniques. The device has no pump or moving parts, and is capable of moving heat at high power densities, using revolutionary coherent porous silicon (CPS) wicks. The CPS wicks minimize packaging thermal mismatch stress and improves strength-to-weight ratio. Also burst-through pressures can be controlled as the diameter of the coherent pores can be controlled on a sub-micron scale. The two phase planar operation provides extremely low specific thermal resistance (20-60 w/cm2).
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: May 25, 2010
    Assignee: University of Cincinnati
    Inventors: H. Thurman Henderson, Ahmed Shuja, Srinivas Parimi, Frank M. Gerner, Praveen Medis
  • Patent number: 7705342
    Abstract: The present invention is a MEMS-based two-phase LHP (loop heat pipe) and CPL (capillary pumped loop) using semiconductor grade silicon and microlithographic/anisotrophic etching techniques to achieve a planar configuration. The principal working material is silicon (and compatible borosilicate glass where necessary), particularly compatible with the cooling needs for electronic and computer chips and package cooling. The microloop heat pipes (?LHP™) utilize cutting edge microfabrication techniques. The device has no pump or moving parts, and is capable of moving heat at high power densities, using revolutionary coherent porous silicon (CPS) wicks. The CPS wicks minimize packaging thermal mismatch stress and improves strength-to-weight ratio. Also burst-through pressures can be controlled as the diameter of the coherent pores can be controlled on a sub-micron scale. The two phase planar operation provides extremely low specific thermal resistance (20-60 W/cm2).
    Type: Grant
    Filed: September 8, 2006
    Date of Patent: April 27, 2010
    Assignee: University of Cincinnati
    Inventors: H. Thurman Henderson, Ahmed Shuja, Srinivas Parimi, Frank M. Gerner, Praveen Medis
  • Patent number: 7692926
    Abstract: The present invention is a MEMS-based two-phase LHP (loop heat pipe) and CPL (capillary pumped loop) using semiconductor grade silicon and microlithographic/anisotropic etching techniques to achieve a planar configuration. The principal working material is silicon (and compatible borosilicate glass where necessary), particularly compatible with the cooling needs for electronic and computer chips and package cooling. The microloop heat pipes (?LHP™) utilize cutting edge microfabrication techniques. The device has no pump or moving parts, and is capable of moving heat at high power densities, using revolutionary coherent porous silicon (CPS) wicks. The CPS wicks minimize packaging thermal mismatch stress and improves strength-to-weight ratio. Also burst-through pressures can be controlled as the diameter of the coherent pores can be controlled on a sub-micron scale. The two phase planar operation provides extremely low specific thermal resistance (20-60 w/cm2).
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: April 6, 2010
    Assignee: Progressive Cooling Solutions, Inc.
    Inventors: H. Thurman Henderson, Ahmed Shuja, Srinivas Parimi, Frank M. Gerner, Praveen Medis
  • Publication number: 20080128898
    Abstract: The present invention is a MEMS-based two-phase LHP (loop heat pipe) and CPL (capillary pumped loop) using semiconductor grade silicon and microlithographic/anisotropic etching techniques to achieve a planar configuration. The principal working material is silicon (and compatible borosilicate glass where necessary), particularly compatible with the cooling needs for electronic and computer chips and package cooling. The microloop heat pipes (?LHP™) utilize cutting edge microfabrication techniques. The device has no pump or moving parts, and is capable of moving heat at high power densities, using revolutionary coherent porous silicon (CPS) wicks. The CPS wicks minimize packaging thermal mismatch stress and improves strength-to-weight ratio. Also burst-through pressures can be controlled as the diameter of the coherent pores can be controlled on a sub-micron scale. The two phase planar operation provides extremely low specific thermal resistance (20-60 w/cm2).
    Type: Application
    Filed: October 31, 2007
    Publication date: June 5, 2008
    Inventors: H. Thurman Henderson, Ahmed Shuja, Srinivas Parimi, Frank M. Gerner, Praveen Medis
  • Publication number: 20080115913
    Abstract: The present invention is a MEMS-based two-phase LHP (loop heat pipe) and CPL (capillary pumped loop) using semiconductor grade silicon and microlithographic/anisotrophic etching techniques to achieve a planar configuration. The principal working material is silicon (and compatible borosilicate glass where necessary), particularly compatible with the cooling needs for electronic and computer chips and package cooling. The microloop heat pipes (?LHP™) utilize cutting edge microfabrication techniques. The device has no pump or moving parts, and is capable of moving heat at high power densities, using revolutionary coherent porous silicon (CPS) wicks. The CPS wicks minimize packaging thermal mismatch stress and improves strength-to-weight ratio. Also burst-through pressures can be controlled as the diameter of the coherent pores can be controlled on a sub-micron scale. The two phase planar operation provides extremely low specific thermal resistance (20-60w/cm2).
    Type: Application
    Filed: October 31, 2007
    Publication date: May 22, 2008
    Inventors: H. Thurman Henderson, Ahmed Shuja, Srinivas Parimi, Frank M. Gerner, Praveen Medis
  • Publication number: 20080115912
    Abstract: The present invention is a MEMS-based two-phase LHP (loop heat pipe) and CPL (capillary pumped loop) using semiconductor grade silicon and microlithographic/anisotrophic etching techniques to achieve a planar configuration. The principal working material is silicon (and compatible borosilicate glass where necessary), particularly compatible with the cooling needs for electronic and computer chips and package cooling. The microloop heat pipes (?LHP™) utilize cutting edge microfabrication techniques. The device has no pump or moving parts, and is capable of moving heat at high power densities, using revolutionary coherent porous silicon (CPS) wicks. The CPS wicks minimize packaging thermal mismatch stress and improves strength-to-weight ratio. Also burst-through pressures can be controlled as the diameter of the coherent pores can be controlled on a sub-micron scale. The two phase planar operation provides extremely low specific thermal resistance (20-60 w/cm2).
    Type: Application
    Filed: October 31, 2007
    Publication date: May 22, 2008
    Inventors: H. Thurman HENDERSON, Ahmed Shuja, Srinivas Parimi, Frank M. Gerner, Praveen Medis
  • Publication number: 20080110598
    Abstract: The present invention is a MEMS-based two-phase LHP (loop heat pipe) and CPL (capillary pumped loop) using semiconductor grade silicon and microlithographic/anisotrophic etching techniques to achieve a planar configuration. The principal working material is silicon (and compatible borosilicate glass where necessary), particularly compatible with the cooling needs for electronic and computer chips and package cooling. The microloop heat pipes (?LHP™) utilize cutting edge microfabrication techniques. The device has no pump or moving parts, and is capable of moving heat at high power densities, using revolutionary coherent porous silicon (CPS) wicks. The CPS wicks minimize packaging thermal mismatch stress and improves strength-to-weight ratio. Also burst-through pressures can be controlled as the diameter of the coherent pores can be controlled on a sub-micron scale. The two phase planar operation provides extremely low specific thermal resistance (20-60 w/cm2).
    Type: Application
    Filed: October 31, 2007
    Publication date: May 15, 2008
    Inventors: H. Thurman Henderson, Ahmed Shuja, Srinivas Parimi, Frank M. Gerner, Praveen Medis
  • Publication number: 20070095507
    Abstract: The present invention is a MEMS-based two-phase LHP (loop heat pipe) and CPL (capillary pumped loop) using semiconductor grade silicon and microlithographic/anisotrophic etching techniques to achieve a planar configuration. The principal working material is silicon (and compatible borosilicate glass where necessary), particularly compatible with the cooling needs for electronic and computer chips and package cooling. The microloop heat pipes (?LHP™) utilize cutting edge microfabrication techniques. The device has no pump or moving parts, and is capable of moving heat at high power densities, using revolutionary coherent porous silicon (CPS) wicks. The CPS wicks minimize packaging thermal mismatch stress and improves strength-to-weight ratio. Also burst-through pressures can be controlled as the diameter of the coherent pores can be controlled on a sub-micron scale. The two phase planar operation provides extremely low specific thermal resistance (20-60W/cm2).
    Type: Application
    Filed: September 8, 2006
    Publication date: May 3, 2007
    Applicant: University of Cincinnati
    Inventors: H. Henderson, Ahmed Shuja, Srinivas Parimi, Frank Gerner, Praveen Medis