Patents by Inventor Srinivas Podila

Srinivas Podila has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6981244
    Abstract: An operating system architecture and method which provides for transparent inheritance of memory management policies in data processing systems and enhanced memory management is disclosed. The operating system provides for a special “debug” process flag to be associated with debug and device management processes. When a source process transmits a message to a destination process, the operating system determines whether the source process is a debug process (i.e., whether the source process contains a debug process flag indicator associated therewith). If the source process is a debug process, a debug process flag indicator is also associated with the destination process. The operating system also reserves a portion of the device's memory (a reserve memory pool) which is only allocated to special “debug” process when the non-reserved pool of memory is depleted.
    Type: Grant
    Filed: September 8, 2000
    Date of Patent: December 27, 2005
    Assignee: Cisco Technology, Inc.
    Inventors: Pradeep K. Kathail, Haresh Kheskani, Srinivas Podila, Sebastien Marineau-Mes