Patents by Inventor Srinivas S. Moola

Srinivas S. Moola has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10002824
    Abstract: Incorporating at least one magnetic alignment structure on a microelectronic device and incorporating at least one alignment coil within a microelectronic substrate, wherein the alignment coil may be powered to form a magnetic field to attract the magnetic alignment structure, thereby aligning the microelectronic device to the microelectronic substrate. After alignment, the microelectronic device may be electrically attached to the substrate. Embodiments may include additionally incorporating an alignment detection coil within the microelectronic substrate, wherein the alignment detection coil may be powered to form a magnetic field to detect variations in the magnetic field generated by the alignment coil in order verify the alignment of the microelectronic device to the microelectronic substrate.
    Type: Grant
    Filed: June 10, 2017
    Date of Patent: June 19, 2018
    Assignee: Intel Corporation
    Inventors: Ankur Agrawal, Srinivas S. Moola, Sujit Sharan, Vijay Govindarajan
  • Publication number: 20170278783
    Abstract: Incorporating at least one magnetic alignment structure on a microelectronic device and incorporating at least one alignment coil within a microelectronic substrate, wherein the alignment coil may be powered to form a magnetic field to attract the magnetic alignment structure, thereby aligning the microelectronic device to the microelectronic substrate. After alignment, the microelectronic device may be electrically attached to the substrate. Embodiments may include additionally incorporating an alignment detection coil within the microelectronic substrate, wherein the alignment detection coil may be powered to form a magnetic field to detect variations in the magnetic field generated by the alignment coil in order verify the alignment of the microelectronic device to the microelectronic substrate.
    Type: Application
    Filed: June 10, 2017
    Publication date: September 28, 2017
    Applicant: INTEL CORPORATION
    Inventors: Ankur Agrawal, Srinivas S. Moola, Sujit Sharan, Vijay Govindarajan
  • Patent number: 9711443
    Abstract: Incorporating at least one magnetic alignment structure on a microelectronic device and incorporating at least one alignment coil within a microelectronic substrate, wherein the alignment coil may be powered to form a magnetic field to attract the magnetic alignment structure, thereby aligning the microelectronic device to the microelectronic substrate. After alignment, the microelectronic device may be electrically attached to the substrate. Embodiments may include additionally incorporating an alignment detection coil within the microelectronic substrate, wherein the alignment detection coil may be powered to form a magnetic field to detect variations in the magnetic field generated by the alignment coil in order verify the alignment of the microelectronic device to the microelectronic substrate.
    Type: Grant
    Filed: November 14, 2015
    Date of Patent: July 18, 2017
    Assignee: Intel Corporation
    Inventors: Ankur Agrawal, Srinivas S. Moola, Sujit Sharan, Vijay Govindarajan
  • Publication number: 20110154277
    Abstract: Embodiments of the invention discuss methods and apparatus for efficiently generating substrate layout for motherboards and packages having high pin-count processors. The method comprises: extracting layout objects associated with a motherboard having a processor; identifying a type for each of the extracted layout objects; reordering the extracted layout objects based on the identified types for each of the extracted layout objects; grouping the layout objects based on the identified types; and generating a motherboard design based on the grouped layout objects.
    Type: Application
    Filed: December 18, 2009
    Publication date: June 23, 2011
    Inventors: Christopher J. Ankenbauer, Srinivas S. Moola, Sam Mirza
  • Patent number: 6393432
    Abstract: A method and system in accordance with the present invention for automatically updating graphical diagrams of logical network layouts is disclosed. The method combines a graphics file with a list of information associating the graphical elements with the database objects and extends a graphics program to automatically reflect database changes in the graphics file and to respond to changes in the database. Through the use of a system and method in accordance with the present invention the user is allowed to create, edit, store, and distribute graphical diagrams of logical network layouts. The diagrams can be created automatically and then edited and distributed by the user. In addition, the user is able to edit the network diagrams without affecting the current as-built view of the network. Finally, the system tracks every network device, passive and active, and associates it with the appropriate physical and logical locations, specifications, serial numbers, warranty information, etc.
    Type: Grant
    Filed: June 2, 1999
    Date of Patent: May 21, 2002
    Assignee: Visionael Corporation
    Inventors: Miles Clay Flansburg, Srinivas S. Moola